T 49000 48400 5 10 1 1 0 0 1
netname=DAC0_0
}
-C 51100 52500 1 0 0 generic-power.sym
+C 51100 52000 1 0 0 generic-power.sym
{
-T 51300 52750 5 10 1 1 0 3 1
+T 51300 52250 5 10 1 1 0 3 1
net=AVdd_dev:1
}
C 51200 45400 1 0 0 gnd-1.sym
N 43700 44600 43700 43600 4
N 43700 43600 40400 43600 4
{
-T 40500 43600 5 10 1 1 0 0 1
-netname=SPI1_MOSI
+T 40600 43600 5 10 1 1 0 0 1
+netname=MOSI0
}
N 43300 44600 43300 44000 4
N 43300 44000 40400 44000 4
{
-T 40500 44000 5 10 1 1 0 0 1
+T 40600 44000 5 10 1 1 0 0 1
netname=CS_ADC0
}
N 44100 44600 44100 43200 4
N 44100 43200 40400 43200 4
{
-T 40500 43200 5 10 1 1 0 0 1
-netname=SPI1_MISO
+T 40600 43200 5 10 1 1 0 0 1
+netname=MISO0
}
C 40500 43900 1 0 0 flag-2.sym
C 40500 43500 1 0 0 flag-2.sym
N 42900 44600 42900 44400 4
N 42900 44400 40400 44400 4
{
-T 40500 44400 5 10 1 1 0 0 1
-netname=SPI1_SCLK
+T 40600 44400 5 10 1 1 0 0 1
+netname=SCLK0
}
C 40500 44300 1 0 0 flag-2.sym
N 53900 49600 52700 49600 4
{
T 52900 49600 5 10 1 1 0 0 1
-netname=SPI1_SCLK
+netname=SCLK0
}
C 46300 48400 1 0 0 resistor-3.sym
{
N 52700 49200 53900 49200 4
{
T 52900 49200 5 10 1 1 0 0 1
-netname=SPI1_MOSI
+netname=MOSI0
}
N 49800 49200 48800 49200 4
{
N 44900 44600 44900 42500 4
N 44900 42500 40400 42500 4
{
-T 40500 42500 5 10 1 1 0 0 1
+T 40600 42500 5 10 1 1 0 0 1
netname=CONVST
}
C 40500 42400 1 0 0 flag-2.sym
T 51400 52100 5 10 0 0 0 0 1
symversion=0.1
}
-N 51300 52500 51300 50800 4
+N 51300 52000 51300 50800 4
N 51600 51800 51600 51900 4