s['vatoi'] = vatoi.dump_config()
s['v430'] = v430.dump_config()
s['ibias'] = ibias.dump_config()
+ # signal generator
+ s['dac'] = dac.dump_config()
# interface busses
s['spi0'] = spi0.dump_config()
s['spi1'] = spi1.dump_config()
else:
cfg = yaml.load(open(name, 'rb'))
- print cfg
-
##########################################################################
# Setup FTDI serial ports
spi0 = usbio.SPI(**cfg['spi0'])
states (idle mode). If audit_cs==False, allows setting the output
state of the configured chip-select pins.
"""
- print pinstate, pindir
if pindir is not None:
self._pindir = pindir
#we are changing pin directions, audit them
else:
self._pinstate = pinstate
- print 'set pins: %02x, %02x' % (self._pinstate, self._pindir)
+ #print 'set pins: %02x, %02x' % (self._pinstate, self._pindir)
cmd = chr(self.ftdi.SET_BITS_LOW) + chr(self._pinstate) + chr(self._pindir)
self._raw_write(cmd)