WIP

diff --git a/sch-pcb/devboard/atoi-1.sch b/sch-pcb/devboard/atoi-1.sch
index ac9b282ca7837694f17499e7211b2504095beee8..e3eba24279728a2ce3196f7fb8d868fd081ac20d 100644 (file)
--- a/sch-pcb/devboard/atoi-1.sch
+++ b/sch-pcb/devboard/atoi-1.sch
@@ -16,55 +16,274 @@ pagenum=1
 T 52100 40300 5 10 1 1 0 6 1
 pageof=??
 }
-C 43900 40200 1 0 0 wb430-1.sym
+C 45600 41400 1 0 0 wb430-1.sym
 {
-T 46600 49100 5 10 1 1 0 3 1
+T 48300 50300 5 10 1 1 0 3 1
 refdes=AtoI
-T 46600 48700 5 10 1 1 0 3 1
+T 48300 49900 5 10 1 1 0 3 1
 footprint=SEMPAC_12x12_100A.fp
 }
-C 41100 41800 1 0 0 m25pe80-1.sym
+C 41000 42100 1 0 0 m25pe80-1.sym
 {
-T 42800 45200 5 10 0 0 0 0 1
+T 42700 45500 5 10 0 0 0 0 1
 footprint=SO8
-T 42100 44300 5 10 1 1 0 3 1
+T 42000 44600 5 10 1 1 0 3 1
 refdes=U100
 }
-N 43100 44500 43900 44500 4
-N 43900 44100 43200 44100 4
-N 43200 44100 43200 45600 4
-N 43200 45600 40800 45600 4
-N 40800 45600 40800 44500 4
-N 41100 43700 40600 43700 4
-N 40600 43700 40600 45800 4
-N 40600 45800 43400 45800 4
-N 43400 45800 43400 44900 4
-N 43400 44900 43900 44900 4
-N 43900 45300 43600 45300 4
-N 43600 45300 43600 46000 4
-N 43600 46000 40400 46000 4
-N 40400 46000 40400 43300 4
-N 40400 43300 41100 43300 4
-N 41100 44500 40800 44500 4
-C 41200 40900 1 0 0 crystal-1.sym
-{
-T 41400 41400 5 10 0 0 0 0 1
+N 45600 45300 43200 45300 4
+N 43200 45300 43200 45900 4
+N 43200 45900 40800 45900 4
+N 40800 45900 40800 44800 4
+N 41000 44000 40600 44000 4
+N 40600 44000 40600 46100 4
+N 40600 46100 45600 46100 4
+N 40400 46500 45600 46500 4
+N 40400 46500 40400 43600 4
+N 40400 43600 41000 43600 4
+N 41000 44800 40800 44800 4
+C 44700 41600 1 0 0 crystal-1.sym
+{
+T 44900 42100 5 10 0 0 0 0 1
 device=CRYSTAL
-T 41400 41200 5 10 1 1 0 0 1
+T 45000 41800 5 10 1 1 0 0 1
 refdes=U?
-T 41400 41600 5 10 0 0 0 0 1
+T 44900 42300 5 10 0 0 0 0 1
 symversion=0.1
-T 41800 41000 5 10 0 0 0 0 1
+T 45300 41700 5 10 0 0 0 0 1
 footprint=XXX
 }
-C 41800 40600 1 0 0 crystal-1.sym
+N 43000 44800 43600 44800 4
+N 43600 44800 43600 45700 4
+N 43600 45700 45600 45700 4
+N 45600 47700 40400 47700 4
+{
+T 40600 47700 5 10 1 1 0 0 1
+netname=IRQ
+}
+C 40500 47600 1 0 0 flag-2.sym
+N 45600 49300 40400 49300 4
+{
+T 40500 49300 5 10 1 1 0 0 1
+netname=SPI1_MISO
+}
+N 45600 49700 40400 49700 4
+{
+T 40500 49700 5 10 1 1 0 0 1
+netname=SPI1_MOSI
+}
+N 45600 50100 40400 50100 4
+{
+T 40500 50100 5 10 1 1 0 0 1
+netname=SPI1_SCLK
+}
+C 40500 49200 1 0 0 flag-2.sym
+C 40500 49600 1 0 0 flag-2.sym
+C 40500 50000 1 0 0 flag-2.sym
+C 42600 47800 1 0 1 jumper-3.sym
+{
+T 42700 49700 5 8 0 0 0 6 1
+device=JUMPER-1xUM
+T 42500 48400 5 10 1 1 0 6 1
+refdes=J?
+T 42500 48700 5 10 0 1 0 6 1
+value=JMP
+T 42500 47600 5 8 0 1 0 6 1
+footprint=1x3PIN
+}
+C 41800 47800 1 0 0 gnd-1.sym
+{
+T 41900 47950 5 10 1 1 0 6 1
+net=AVSS:1
+}
+N 42200 47900 42200 48100 4
+N 42200 48100 41900 48100 4
+C 42800 48000 1 0 0 resistor-1.sym
+{
+T 43100 48400 5 10 0 0 0 0 1
+device=RESISTOR
+T 42800 48200 5 10 1 1 0 0 1
+refdes=R?
+T 43300 48200 5 10 1 1 0 0 1
+value=100k
+}
+N 42800 48100 42600 48100 4
+N 43700 48100 45600 48100 4
+C 41700 48300 1 0 0 generic-power.sym
 {
-T 42000 41100 5 10 0 0 0 0 1
+T 41900 48550 5 10 1 1 0 3 1
+net=DVdd_ns430
+}
+N 42200 48300 41900 48300 4
+C 41800 45500 1 0 0 generic-power.sym
+{
+T 42000 45750 5 10 1 1 0 3 1
+net=AVdd_dev
+}
+C 41900 41800 1 0 0 gnd-1.sym
+{
+T 42000 41950 5 10 1 1 0 6 1
+net=AVSS:1
+}
+C 52500 48400 1 90 0 jumper.sym
+{
+T 51900 48600 5 10 1 1 0 0 1
+refdes=J?
+T 52300 48700 5 8 0 1 90 0 1
+footprint=JMP_2PIN
+T 50400 48500 5 8 0 0 90 0 1
+symversion=1.0
+T 52200 48700 5 8 0 1 90 0 1
+value=Jumper
+T 50200 48500 5 8 0 0 90 0 1
+value=jumper
+}
+N 51800 48500 51000 48500 4
+N 52400 48500 53600 48500 4
+{
+T 52900 48500 5 10 1 1 0 0 1
+netname=RST
+}
+N 44400 44500 45600 44500 4
+{
+T 44700 44500 5 10 1 1 0 0 1
+netname=RST
+}
+C 45000 51800 1 0 1 jumper-3.sym
+{
+T 45100 53700 5 8 0 0 0 6 1
+device=JUMPER-1xUM
+T 44900 52700 5 10 0 1 0 6 1
+value=JMP
+T 44900 51600 5 8 0 1 0 6 1
+footprint=1x3PIN
+T 44900 52400 5 10 1 1 0 6 1
+refdes=J?
+}
+C 44200 51800 1 0 0 gnd-1.sym
+{
+T 44300 51950 5 10 1 1 0 6 1
+net=AVSS:1
+}
+N 44600 51900 44600 52100 4
+N 44600 52100 44300 52100 4
+C 44100 52300 1 0 0 generic-power.sym
+{
+T 44300 52550 5 10 1 1 0 3 1
+net=DVdd_ns430
+}
+N 44600 52300 44300 52300 4
+N 45000 52100 45600 52100 4
+C 44400 40700 1 0 0 capacitor-3.sym
+{
+T 44400 41700 5 10 0 0 0 0 1
+device=CAPACITOR
+T 44700 41300 5 10 1 1 0 0 1
+refdes=C?
+T 44400 41900 5 10 0 0 0 0 1
+symversion=0.1
+T 44700 40900 5 10 1 1 0 0 1
+value=12.5p
+}
+C 45300 40700 1 0 0 capacitor-3.sym
+{
+T 45300 41700 5 10 0 0 0 0 1
+device=CAPACITOR
+T 45600 41300 5 10 1 1 0 0 1
+refdes=C?
+T 45300 41900 5 10 0 0 0 0 1
+symversion=0.1
+T 45600 40900 5 10 1 1 0 0 1
+value=12.5p
+}
+C 44600 42000 1 0 0 resistor-1.sym
+{
+T 44900 42400 5 10 0 0 0 0 1
+device=RESISTOR
+T 44700 42200 5 10 1 1 0 0 1
+refdes=R?
+T 45200 42200 5 10 1 1 0 0 1
+value=2M
+}
+C 45100 40400 1 0 0 gnd-1.sym
+{
+T 45200 40550 5 10 1 1 0 6 1
+net=AVSS:1
+}
+N 44600 40700 45500 40700 4
+N 44600 41600 44600 42500 4
+N 44700 41700 44600 41700 4
+N 45500 42100 45500 41600 4
+N 45500 41700 45400 41700 4
+C 43200 43200 1 0 0 crystal-1.sym
+{
+T 43400 43700 5 10 0 0 0 0 1
 device=CRYSTAL
-T 42000 40900 5 10 1 1 0 0 1
-refdes=U?
-T 42000 41300 5 10 0 0 0 0 1
+T 43400 43900 5 10 0 0 0 0 1
 symversion=0.1
-T 42400 40700 5 10 0 0 0 0 1
+T 43800 43300 5 10 0 0 0 0 1
 footprint=XXX
+T 43700 43400 5 10 1 1 0 0 1
+refdes=U?
+}
+C 42900 42300 1 0 0 capacitor-3.sym
+{
+T 42900 43300 5 10 0 0 0 0 1
+device=CAPACITOR
+T 42900 43500 5 10 0 0 0 0 1
+symversion=0.1
+T 43200 42900 5 10 1 1 0 0 1
+refdes=C?
+T 43200 42500 5 10 1 1 0 0 1
+value=12.5p
+}
+C 43800 42300 1 0 0 capacitor-3.sym
+{
+T 43800 43300 5 10 0 0 0 0 1
+device=CAPACITOR
+T 43800 43500 5 10 0 0 0 0 1
+symversion=0.1
+T 44100 42900 5 10 1 1 0 0 1
+refdes=C?
+T 44100 42500 5 10 1 1 0 0 1
+value=12.5p
+}
+C 43100 43600 1 0 0 resistor-1.sym
+{
+T 43400 44000 5 10 0 0 0 0 1
+device=RESISTOR
+T 43200 43800 5 10 1 1 0 0 1
+refdes=R?
+T 43700 43800 5 10 1 1 0 0 1
+value=2M
+}
+C 43600 42000 1 0 0 gnd-1.sym
+{
+T 43700 42150 5 10 1 1 0 6 1
+net=AVSS:1
+}
+N 43100 42300 44000 42300 4
+N 43100 43200 43100 44000 4
+N 43200 43300 43100 43300 4
+N 44000 43700 44000 43200 4
+N 44000 43300 43900 43300 4
+N 45600 42100 45500 42100 4
+N 44600 42500 45600 42500 4
+N 45600 43300 44000 43300 4
+N 45600 43700 45400 43700 4
+N 45400 43700 45400 44000 4
+N 45400 44000 43100 44000 4
+C 44500 44400 1 0 0 flag-2.sym
+C 45200 42600 1 0 0 gnd-1.sym
+{
+T 45300 42750 5 10 1 1 0 6 1
+net=AVSS:1
+}
+N 45300 42900 45600 42900 4
+N 44600 41900 44000 41900 4
+N 44000 41900 44000 41400 4
+N 44000 41400 40400 41400 4
+{
+T 40600 41400 5 10 1 1 0 0 1
+netname=HFXT
 }
+C 40500 41300 1 0 0 flag-2.sym

diff --git a/sch-pcb/devboard/atoi-6.sch b/sch-pcb/devboard/atoi-6.sch
index ddce70c4d71b80ed992b0597f9e668e2189c9f3e..d3fbbb6da799950577fdcfe06538b5d3522c8520 100644 (file)
--- a/sch-pcb/devboard/atoi-6.sch
+++ b/sch-pcb/devboard/atoi-6.sch
@@ -63,251 +63,251 @@ N 40400 46800 42300 46800 4
 T 40500 46800 5 10 1 1 0 0 1
 netname=ADC0_IN7
 }
-C 50600 45700 1 0 0 EMBEDDEDdac8568-1.sym
+C 49800 45700 1 0 0 EMBEDDEDdac8568-1.sym
 [
-B 50900 46000 2300 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-V 50850 49600 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 50600 49600 50800 49600 1 0 0
+B 50100 46000 2300 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+V 50050 49600 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 49800 49600 50000 49600 1 0 0
 {
-T 50950 49600 9 10 1 1 0 1 1
+T 50150 49600 9 10 1 1 0 1 1
 pinlabel=\_LDAC\_
-T 50800 49650 5 8 1 1 0 6 1
+T 50000 49650 5 8 1 1 0 6 1
 pinnumber=1
-T 50800 49650 5 8 0 1 0 6 1
+T 50000 49650 5 8 0 1 0 6 1
 pinseq=1
-T 50800 49650 9 10 0 1 0 6 1
+T 50000 49650 9 10 0 1 0 6 1
 pintype=in
 }
-V 50850 49200 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 50600 49200 50800 49200 1 0 0
+V 50050 49200 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 49800 49200 50000 49200 1 0 0
 {
-T 50950 49200 9 10 1 1 0 1 1
+T 50150 49200 9 10 1 1 0 1 1
 pinlabel=\_SYNC\_
-T 50800 49250 5 8 1 1 0 6 1
+T 50000 49250 5 8 1 1 0 6 1
 pinnumber=2
-T 50800 49250 5 8 0 1 0 6 1
+T 50000 49250 5 8 0 1 0 6 1
 pinseq=2
-T 50800 49250 9 10 0 1 0 6 1
+T 50000 49250 9 10 0 1 0 6 1
 pintype=in
 }
-P 52100 50800 52100 50500 1 0 0
+P 51300 50800 51300 50500 1 0 0
 {
-T 52100 50450 9 10 1 1 90 7 1
+T 51300 50450 9 10 1 1 90 7 1
 pinlabel=AVDD
-T 52150 50550 5 8 1 1 0 0 1
+T 51350 50550 5 8 1 1 0 0 1
 pinnumber=3
-T 52150 50550 5 8 0 1 0 0 1
+T 51350 50550 5 8 0 1 0 0 1
 pinseq=3
-T 52000 45750 9 10 0 1 0 6 1
+T 51200 45750 9 10 0 1 0 6 1
 pintype=pwr
 }
-P 50600 48400 50900 48400 1 0 0
+P 49800 48400 50100 48400 1 0 0
 {
-T 50950 48400 9 10 1 1 0 1 1
+T 50150 48400 9 10 1 1 0 1 1
 pinlabel=Vout0
-T 50800 48450 5 8 1 1 0 6 1
+T 50000 48450 5 8 1 1 0 6 1
 pinnumber=4
-T 50800 48450 5 8 0 1 0 6 1
+T 50000 48450 5 8 0 1 0 6 1
 pinseq=4
-T 50800 48450 9 10 0 1 0 6 1
+T 50000 48450 9 10 0 1 0 6 1
 pintype=out
 }
-P 50600 48000 50900 48000 1 0 0
+P 49800 48000 50100 48000 1 0 0
 {
-T 50950 48000 9 10 1 1 0 1 1
+T 50150 48000 9 10 1 1 0 1 1
 pinlabel=Vout2
-T 50800 48050 5 8 1 1 0 6 1
+T 50000 48050 5 8 1 1 0 6 1
 pinnumber=5
-T 50800 48050 5 8 0 1 0 6 1
+T 50000 48050 5 8 0 1 0 6 1
 pinseq=5
-T 50800 48050 9 10 0 1 0 6 1
+T 50000 48050 9 10 0 1 0 6 1
 pintype=out
 }
-P 50600 47600 50900 47600 1 0 0
+P 49800 47600 50100 47600 1 0 0
 {
-T 50950 47600 9 10 1 1 0 1 1
+T 50150 47600 9 10 1 1 0 1 1
 pinlabel=Vout4
-T 50800 47650 5 8 1 1 0 6 1
+T 50000 47650 5 8 1 1 0 6 1
 pinnumber=6
-T 50800 47650 5 8 0 1 0 6 1
+T 50000 47650 5 8 0 1 0 6 1
 pinseq=6
-T 50800 47650 9 10 0 1 0 6 1
+T 50000 47650 9 10 0 1 0 6 1
 pintype=out
 }
-P 50600 47200 50900 47200 1 0 0
+P 49800 47200 50100 47200 1 0 0
 {
-T 50950 47200 9 10 1 1 0 1 1
+T 50150 47200 9 10 1 1 0 1 1
 pinlabel=Vout6
-T 50800 47250 5 8 1 1 0 6 1
+T 50000 47250 5 8 1 1 0 6 1
 pinnumber=7
-T 50800 47250 5 8 0 1 0 6 1
+T 50000 47250 5 8 0 1 0 6 1
 pinseq=7
-T 50800 47250 9 10 0 1 0 6 1
+T 50000 47250 9 10 0 1 0 6 1
 pintype=out
 }
-P 50600 46400 50900 46400 1 0 0
+P 49800 46400 50100 46400 1 0 0
 {
-T 50950 46400 9 10 1 1 0 1 1
+T 50150 46400 9 10 1 1 0 1 1
 pinlabel=Vref
-T 50800 46450 5 8 1 1 0 6 1
+T 50000 46450 5 8 1 1 0 6 1
 pinnumber=8
-T 50800 46450 5 8 0 1 0 6 1
+T 50000 46450 5 8 0 1 0 6 1
 pinseq=8
-T 50800 46450 9 10 0 1 0 6 1
+T 50000 46450 9 10 0 1 0 6 1
 pintype=out
 }
-V 53250 46400 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 53500 46400 53300 46400 1 0 0
+V 52450 46400 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 52700 46400 52500 46400 1 0 0
 {
-T 53150 46400 9 10 1 1 0 7 1
+T 52350 46400 9 10 1 1 0 7 1
 pinlabel=\_CLR\_
-T 53300 46450 5 8 1 1 0 0 1
+T 52500 46450 5 8 1 1 0 0 1
 pinnumber=9
-T 53300 46450 5 8 0 1 0 0 1
+T 52500 46450 5 8 0 1 0 0 1
 pinseq=9
-T 53100 46450 9 10 0 1 0 6 1
+T 52300 46450 9 10 0 1 0 6 1
 pintype=in
 }
-P 53500 47200 53200 47200 1 0 0
+P 52700 47200 52400 47200 1 0 0
 {
-T 53150 47200 9 10 1 1 0 7 1
+T 52350 47200 9 10 1 1 0 7 1
 pinlabel=Vout7
-T 53300 47250 5 8 1 1 0 0 1
+T 52500 47250 5 8 1 1 0 0 1
 pinnumber=10
-T 53300 47250 5 8 0 1 0 0 1
+T 52500 47250 5 8 0 1 0 0 1
 pinseq=10
-T 53100 47250 9 10 0 1 0 6 1
+T 52300 47250 9 10 0 1 0 6 1
 pintype=out
 }
-P 53500 47600 53200 47600 1 0 0
+P 52700 47600 52400 47600 1 0 0
 {
-T 53150 47600 9 10 1 1 0 7 1
+T 52350 47600 9 10 1 1 0 7 1
 pinlabel=Vout5
-T 53300 47650 5 8 1 1 0 0 1
+T 52500 47650 5 8 1 1 0 0 1
 pinnumber=11
-T 53300 47650 5 8 0 1 0 0 1
+T 52500 47650 5 8 0 1 0 0 1
 pinseq=11
-T 53100 47650 9 10 0 1 0 6 1
+T 52300 47650 9 10 0 1 0 6 1
 pintype=out
 }
-P 53500 48000 53200 48000 1 0 0
+P 52700 48000 52400 48000 1 0 0
 {
-T 53150 48000 9 10 1 1 0 7 1
+T 52350 48000 9 10 1 1 0 7 1
 pinlabel=Vout3
-T 53300 48050 5 8 1 1 0 0 1
+T 52500 48050 5 8 1 1 0 0 1
 pinnumber=12
-T 53300 48050 5 8 0 1 0 0 1
+T 52500 48050 5 8 0 1 0 0 1
 pinseq=12
-T 53100 48050 9 10 0 1 0 6 1
+T 52300 48050 9 10 0 1 0 6 1
 pintype=out
 }
-P 53500 48400 53200 48400 1 0 0
+P 52700 48400 52400 48400 1 0 0
 {
-T 53150 48400 9 10 1 1 0 7 1
+T 52350 48400 9 10 1 1 0 7 1
 pinlabel=Vout1
-T 53300 48450 5 8 1 1 0 0 1
+T 52500 48450 5 8 1 1 0 0 1
 pinnumber=13
-T 53300 48450 5 8 0 1 0 0 1
+T 52500 48450 5 8 0 1 0 0 1
 pinseq=13
-T 53100 48450 9 10 0 1 0 6 1
+T 52300 48450 9 10 0 1 0 6 1
 pintype=out
 }
-P 52100 45700 52100 46000 1 0 0
+P 51300 45700 51300 46000 1 0 0
 {
-T 52100 46050 9 10 1 1 90 1 1
+T 51300 46050 9 10 1 1 90 1 1
 pinlabel=GND
-T 52150 45950 5 8 1 1 0 2 1
+T 51350 45950 5 8 1 1 0 2 1
 pinnumber=14
-T 52150 45950 5 8 0 1 0 2 1
+T 51350 45950 5 8 0 1 0 2 1
 pinseq=14
-T 52000 46150 9 10 0 1 0 6 1
+T 51200 46150 9 10 0 1 0 6 1
 pintype=pwr
 }
-P 53500 49200 53200 49200 1 0 0
+P 52700 49200 52400 49200 1 0 0
 {
-T 53150 49200 9 10 1 1 0 7 1
+T 52350 49200 9 10 1 1 0 7 1
 pinlabel=DIN
-T 53300 49250 5 8 1 1 0 0 1
+T 52500 49250 5 8 1 1 0 0 1
 pinnumber=15
-T 53300 49250 5 8 0 1 0 0 1
+T 52500 49250 5 8 0 1 0 0 1
 pinseq=15
-T 53100 49250 9 10 0 1 0 6 1
+T 52300 49250 9 10 0 1 0 6 1
 pintype=in
 }
-P 53500 49600 53200 49600 1 0 0
+P 52700 49600 52400 49600 1 0 0
 {
-T 53150 49600 9 10 1 1 0 7 1
+T 52350 49600 9 10 1 1 0 7 1
 pinlabel=SCLK
-T 53300 49650 5 8 1 1 0 0 1
+T 52500 49650 5 8 1 1 0 0 1
 pinnumber=16
-T 53300 49650 5 8 0 1 0 0 1
+T 52500 49650 5 8 0 1 0 0 1
 pinseq=16
-T 53100 49650 9 10 0 1 0 6 1
+T 52300 49650 9 10 0 1 0 6 1
 pintype=in
 }
-T 53200 50600 9 10 0 0 0 0 1
+T 52400 50600 9 10 0 0 0 0 1
 document=dac8586.pdf
-T 53200 50800 9 10 0 0 0 0 1
+T 52400 50800 9 10 0 0 0 0 1
 footprint=TSSOP_16N__TI
-T 52100 49400 9 10 0 1 0 3 1
+T 51300 49400 9 10 0 1 0 3 1
 refdes=U?
-T 52100 49000 9 10 1 1 0 3 1
+T 51300 49000 9 10 1 1 0 3 1
 DAC8568
 ]
 {
-T 53100 43700 5 10 0 0 0 0 1
+T 52300 43700 5 10 0 0 0 0 1
 footprint=TSSOP_16N__TI
-T 52100 49400 5 10 1 1 0 3 1
+T 51300 49400 5 10 1 1 0 3 1
 refdes=U601
 }
-N 50600 48400 49700 48400 4
+N 49800 48400 48900 48400 4
 {
-T 49800 48400 5 10 1 1 0 0 1
+T 49000 48400 5 10 1 1 0 0 1
 netname=DAC0_0
 }
-C 51900 50800 1 0 0 generic-power.sym
+C 51100 50800 1 0 0 generic-power.sym
 {
-T 52100 51050 5 10 1 1 0 3 1
+T 51300 51050 5 10 1 1 0 3 1
 net=AVdd_dev:1
 }
-C 52000 45400 1 0 0 gnd-1.sym
+C 51200 45400 1 0 0 gnd-1.sym
 {
-T 51900 45250 5 10 1 1 0 0 1
+T 51100 45250 5 10 1 1 0 0 1
 net=AVSS:1
 }
-N 50600 48000 49700 48000 4
+N 49800 48000 48900 48000 4
 {
-T 49800 48000 5 10 1 1 0 0 1
+T 49000 48000 5 10 1 1 0 0 1
 netname=DAC0_2
 }
-N 50600 47600 49700 47600 4
+N 49800 47600 48900 47600 4
 {
-T 49800 47600 5 10 1 1 0 0 1
+T 49000 47600 5 10 1 1 0 0 1
 netname=DAC0_4
 }
-N 50600 47200 49700 47200 4
+N 49800 47200 48900 47200 4
 {
-T 49800 47200 5 10 1 1 0 0 1
-netname=DAC0_06
+T 49000 47200 5 10 1 1 0 0 1
+netname=DAC0_6
 }
-N 54400 48400 53500 48400 4
+N 53600 48400 52700 48400 4
 {
-T 53700 48400 5 10 1 1 0 0 1
+T 52900 48400 5 10 1 1 0 0 1
 netname=DAC0_1
 }
-N 54400 48000 53500 48000 4
+N 52700 48000 54800 48000 4
 {
-T 53700 48000 5 10 1 1 0 0 1
+T 52900 48000 5 10 1 1 0 0 1
 netname=DAC0_3
 }
-N 54400 47600 53500 47600 4
+N 53600 47600 52700 47600 4
 {
-T 53700 47600 5 10 1 1 0 0 1
+T 52900 47600 5 10 1 1 0 0 1
 netname=DAC0_5
 }
-N 54400 47200 53500 47200 4
+N 53600 47200 52700 47200 4
 {
-T 53700 47200 5 10 1 1 0 0 1
+T 52900 47200 5 10 1 1 0 0 1
 netname=DAC0_7
 }
 C 40500 46700 1 0 0 flag-2.sym
@@ -345,21 +345,15 @@ C 55700 49000 1 0 0 flag-2.sym
 N 56600 48700 55400 48700 4
 {
 T 55800 48700 5 10 1 1 0 0 1
-netname=DAC0_2
+netname=INA
 }
 C 55700 48600 1 0 0 flag-2.sym
 N 56600 48300 55400 48300 4
 {
 T 55800 48300 5 10 1 1 0 0 1
-netname=DAC0_3
+netname=INB
 }
 C 55700 48200 1 0 0 flag-2.sym
-N 56600 47900 55400 47900 4
-{
-T 55800 47900 5 10 1 1 0 0 1
-netname=DAC0_4
-}
-C 55700 47800 1 0 0 flag-2.sym
 N 56600 47500 55400 47500 4
 {
 T 55800 47500 5 10 1 1 0 0 1
@@ -411,9 +405,9 @@ T 40500 44400 5 10 1 1 0 0 1
 netname=SPI1_SCLK
 }
 C 40500 44300 1 0 0 flag-2.sym
-N 54700 49600 53500 49600 4
+N 53900 49600 52700 49600 4
 {
-T 53700 49600 5 10 1 1 0 0 1
+T 52900 49600 5 10 1 1 0 0 1
 netname=SPI1_SCLK
 }
 C 46300 48400 1 0 0 resistor-3.sym
@@ -520,35 +514,35 @@ N 45500 48000 45900 48000 4
 N 45900 48000 45900 48300 4
 N 45900 48300 46400 48300 4
 N 46400 48200 46400 48400 4
-N 53500 49200 54700 49200 4
+N 52700 49200 53900 49200 4
 {
-T 53700 49200 5 10 1 1 0 0 1
+T 52900 49200 5 10 1 1 0 0 1
 netname=SPI1_MOSI
 }
-N 50600 49200 49600 49200 4
+N 49800 49200 48800 49200 4
 {
-T 49700 49200 5 10 1 1 0 0 1
+T 48900 49200 5 10 1 1 0 0 1
 netname=CS_DAC0
 }
-C 49500 49300 1 0 1 jumper-3.sym
+C 48700 49300 1 0 1 jumper-3.sym
 {
-T 49600 51200 5 8 0 0 0 6 1
+T 48800 51200 5 8 0 0 0 6 1
 device=JUMPER-1xUM
-T 49400 49900 5 10 1 1 0 6 1
+T 48600 49900 5 10 1 1 0 6 1
 refdes=J601
-T 49400 50200 5 10 0 1 0 6 1
+T 48600 50200 5 10 0 1 0 6 1
 value=JMP
-T 49400 49100 5 8 0 1 0 6 1
+T 48600 49100 5 8 0 1 0 6 1
 footprint=1x3PIN
 }
-N 50600 49600 49500 49600 4
-C 48800 48900 1 0 0 gnd-1.sym
+N 49800 49600 48700 49600 4
+C 48000 48900 1 0 0 gnd-1.sym
 {
-T 48700 48750 5 10 1 1 0 0 1
+T 47900 48750 5 10 1 1 0 0 1
 net=AVSS:1
 }
-N 49100 49400 48900 49400 4
-N 48900 49400 48900 49200 4
+N 48300 49400 48100 49400 4
+N 48100 49400 48100 49200 4
 C 50500 42100 1 0 0 opamp-dual-1.sym
 {
 T 49600 42800 5 10 0 0 0 0 1
@@ -560,7 +554,7 @@ symversion=0.2
 T 50100 41200 5 10 0 0 0 0 1
 slot=2
 T 50600 42900 5 10 1 1 0 0 1
-refdes=U603
+refdes=U601b
 T 51200 42800 5 10 1 0 0 0 1
 slot=2
 T 51200 42200 5 10 1 1 0 0 1
@@ -575,7 +569,7 @@ footprint=SOT23__Maxim
 T 52600 45800 5 10 0 0 0 0 1
 symversion=0.2
 T 50600 44700 5 10 1 1 0 0 1
-refdes=U602
+refdes=U601a
 T 51200 44600 5 10 1 0 0 0 1
 slot=1
 T 51200 44000 5 10 1 1 0 0 1
@@ -642,7 +636,7 @@ C 53000 44200 1 0 1 resistor-1.sym
 {
 T 52700 44600 5 10 0 0 0 6 1
 device=RESISTOR
-T 52800 44500 5 10 1 1 0 6 1
+T 53000 44500 5 10 1 1 0 6 1
 refdes=R603
 T 52400 44500 5 10 1 1 0 6 1
 value=10
@@ -651,7 +645,7 @@ C 53000 42400 1 0 1 resistor-1.sym
 {
 T 52700 42800 5 10 0 0 0 6 1
 device=RESISTOR
-T 52800 42700 5 10 1 1 0 6 1
+T 53000 42700 5 10 1 1 0 6 1
 refdes=R604
 T 52400 42700 5 10 1 1 0 6 1
 value=10
@@ -671,11 +665,15 @@ net=AVSS:1
 N 48800 42300 48800 42100 4
 N 49600 42300 49600 42200 4
 N 49600 42200 48800 42200 4
-N 53000 42500 54000 42500 4
-N 53000 44300 54200 44300 4
+N 53000 42500 54200 42500 4
+{
+T 53400 42500 5 10 1 1 0 0 1
+netname=Vref/2b
+}
+N 53000 44300 54600 44300 4
 {
 T 53900 44300 5 10 1 1 0 6 1
-netname=Vref/2
+netname=Vref/2a
 }
 C 45000 49900 1 0 0 jumper-3.sym
 {
@@ -696,24 +694,24 @@ net=AVSS:1
 N 45600 50000 45400 50000 4
 N 45000 50200 44500 50200 4
 N 44500 50200 44500 49400 4
-N 50600 46400 48600 46400 4
-C 49800 45400 1 0 0 capacitor-3.sym
+N 49800 46400 48600 46400 4
+C 49000 45400 1 0 0 capacitor-3.sym
 {
-T 49800 46400 5 10 0 0 0 0 1
+T 49000 46400 5 10 0 0 0 0 1
 device=CAPACITOR
-T 50100 46000 5 10 1 1 0 0 1
+T 49300 46000 5 10 1 1 0 0 1
 refdes=C604
-T 49800 46600 5 10 0 0 0 0 1
+T 49000 46600 5 10 0 0 0 0 1
 symversion=0.1
-T 50100 45600 5 10 1 1 0 0 1
+T 49300 45600 5 10 1 1 0 0 1
 value=10u
 }
-C 49900 45100 1 0 0 gnd-1.sym
+C 49100 45100 1 0 0 gnd-1.sym
 {
-T 49800 44950 5 10 1 1 0 0 1
+T 49000 44950 5 10 1 1 0 0 1
 net=AVSS:1
 }
-N 50000 46300 50000 46400 4
+N 49200 46300 49200 46400 4
 N 56600 45000 55500 45000 4
 {
 T 55800 45000 5 10 1 1 0 0 1
@@ -731,3 +729,83 @@ value=JMP
 T 55400 44500 5 8 0 1 0 6 1
 footprint=1x3PIN
 }
+N 45400 50400 46500 50400 4
+{
+T 45800 50500 5 10 1 1 0 0 1
+netname=Vref/2b
+}
+N 54600 44300 54600 44800 4
+N 54600 44800 55100 44800 4
+N 55100 45200 54200 45200 4
+{
+T 54300 45200 5 10 1 1 0 0 1
+netname=DAC0_4
+}
+C 47900 50000 1 0 0 generic-power.sym
+{
+T 48100 50250 5 10 1 1 0 3 1
+net=AVdd_dev:1
+}
+N 48300 49800 48100 49800 4
+N 48100 49800 48100 50000 4
+N 42300 45600 40400 45600 4
+{
+T 40600 45600 5 10 1 1 0 0 1
+netname=IRQ
+}
+C 40500 45500 1 0 0 flag-2.sym
+C 55500 48600 1 90 0 jumper.sym
+{
+T 54900 48800 5 10 1 1 0 0 1
+refdes=J602
+T 55300 48900 5 8 0 1 90 0 1
+footprint=JMP_2PIN
+T 53400 48700 5 8 0 0 90 0 1
+symversion=1.0
+T 55200 48900 5 8 0 1 90 0 1
+value=Jumper
+T 53200 48700 5 8 0 0 90 0 1
+value=jumper
+}
+C 55500 48200 1 90 0 jumper.sym
+{
+T 54900 48400 5 10 1 1 0 0 1
+refdes=J602
+T 55300 48500 5 8 0 1 90 0 1
+footprint=JMP_2PIN
+T 53400 48300 5 8 0 0 90 0 1
+symversion=1.0
+T 55200 48500 5 8 0 1 90 0 1
+value=Jumper
+T 53200 48300 5 8 0 0 90 0 1
+value=jumper
+}
+N 54800 48700 53800 48700 4
+{
+T 54100 48700 5 10 1 1 0 0 1
+netname=DAC0_2
+}
+N 54800 48000 54800 48300 4
+C 53000 46100 1 0 0 jumper-3.sym
+{
+T 52900 48000 5 8 0 0 0 0 1
+device=JUMPER-1xUM
+T 53100 46700 5 10 1 1 0 0 1
+refdes=J600
+T 53100 47000 5 10 0 1 0 0 1
+value=JMP
+T 53100 45900 5 8 0 1 0 0 1
+footprint=1x3PIN
+}
+N 53000 46400 52700 46400 4
+N 53400 46200 54100 46200 4
+{
+T 53600 46200 5 10 1 1 0 0 1
+netname=RST
+}
+C 53900 46600 1 0 0 generic-power.sym
+{
+T 54100 46850 5 10 1 1 0 3 1
+net=AVdd_dev:1
+}
+N 54100 46600 53400 46600 4