Add buffer and 2-NAND syms

diff --git a/logic/74AHC1G125-1.sym b/logic/74AHC1G125-1.sym
index 814ad70013bb66b163e109a3ba583686dfd92c45..b0860d052af62ce4e317c12f08aba3cfee71296e 100644 (file)
--- a/logic/74AHC1G125-1.sym
+++ b/logic/74AHC1G125-1.sym
@@ -1,64 +1,75 @@
-v 20031231 1
+v 20111231 2
 L 300 800 800 500 3 0 0 0 -1 -1
 T 600 900 5 10 0 0 0 0 1
-device=7404
-T 600 1100 5 10 0 0 0 0 1
-slot=1
-T 600 1300 5 10 0 0 0 0 1
-numslots=6
-T 600 1500 5 10 0 0 0 0 1
-slotdef=1:1,2
-T 600 1700 5 10 0 0 0 0 1
-slotdef=2:3,4
-T 600 1900 5 10 0 0 0 0 1
-slotdef=3:5,6
-T 600 2100 5 10 0 0 0 0 1
-slotdef=4:9,8
-T 600 2300 5 10 0 0 0 0 1
-slotdef=5:11,10
-T 600 2500 5 10 0 0 0 0 1
-slotdef=6:13,12
+device=74125
 L 800 500 300 200 3 0 0 0 -1 -1
 L 300 800 300 500 3 0 0 0 -1 -1
 L 300 500 300 200 3 0 0 0 -1 -1
-V 850 500 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
 P 300 500 0 500 1 0 1
 {
-T 200 550 5 8 1 1 0 6 1
-pinnumber=1
+T 200 550 5 8 0 1 0 6 1
+pinnumber=2
 T 200 450 5 8 0 1 0 8 1
-pinseq=1
+pinseq=2
 T 350 500 9 8 0 1 0 0 1
 pinlabel=A
 T 350 500 5 8 0 1 0 2 1
 pintype=in
 }
-P 1100 500 900 500 1 0 0
+P 1100 500 800 500 1 0 0
 {
-T 900 550 5 8 1 1 0 0 1
-pinnumber=2
+T 900 550 5 8 0 1 0 0 1
+pinnumber=4
 T 900 450 5 8 0 1 0 2 1
-pinseq=2
+pinseq=4
 T 750 500 9 8 0 1 0 6 1
-pinlabel=Y
+pinlabel=4
 T 750 500 5 8 0 1 0 8 1
 pintype=out
 }
-T 300 0 9 8 1 0 0 0 1
-7404
-T 300 900 8 10 1 1 0 0 1
+T 600 700 8 10 1 1 0 0 1
 refdes=U?
-T 600 2900 5 10 0 0 0 0 1
-pins=14
-T 600 2700 5 10 0 0 0 0 1
-class=IC
-T 600 3300 5 10 0 0 0 0 1
-net=GND:7
-T 600 3100 5 10 0 0 0 0 1
-net=Vcc:14
-T 600 3500 5 10 0 0 0 0 1
-footprint=DIP14
-T 600 3700 5 10 0 0 0 0 1
-description=6 NOT gates
-T 600 3900 5 10 0 0 0 0 1
-documentation=http://www-s.ti.com/sc/ds/sn74hc04.pdf
+T 600 1500 5 10 0 0 0 0 1
+footprint=SC74
+T 600 1700 5 10 0 0 0 0 1
+description=Buffer with act-low enable
+T 600 1900 5 10 0 0 0 0 1
+documentation=74AHC1G125.pdf
+T 600 1100 5 10 0 0 0 0 1
+value=74AHC1G125GV
+T 600 1300 5 10 0 0 0 0 1
+pn-digikey=568-7710-1-ND
+P 400 1000 400 750 1 0 0
+{
+T 395 800 5 8 0 1 0 0 1
+pinnumber=6
+T 450 800 5 8 0 1 90 2 1
+pinseq=6
+T 395 700 9 6 1 1 0 5 1
+pinlabel=V+
+T 400 650 5 8 0 1 90 8 1
+pintype=pwr
+}
+P 400 0 400 250 1 0 0
+{
+T 395 200 5 8 0 1 0 2 1
+pinnumber=3
+T 350 200 5 8 0 1 270 2 1
+pinseq=3
+T 405 300 9 6 1 1 0 3 1
+pinlabel=V-
+T 400 350 5 8 0 1 270 8 1
+pintype=pwr
+}
+P 700 100 700 350 1 0 0
+{
+T 695 300 5 8 0 1 0 2 1
+pinnumber=1
+T 650 300 5 8 0 1 270 2 1
+pinseq=1
+T 705 450 9 6 1 1 0 6 1
+pinlabel=\_OE\_
+T 700 450 5 8 0 1 270 8 1
+pintype=in
+}
+V 700 400 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1

diff --git a/logic/74AUP2G132-1.sym b/logic/74AUP2G132-1.sym
new file mode 100644 (file)
index 0000000..62c0b2f
--- /dev/null
+++ b/logic/74AUP2G132-1.sym
@@ -0,0 +1,87 @@
+v 20111231 2
+L 300 300 300 900 3 0 0 0 -1 -1
+L 300 900 700 900 3 0 0 0 -1 -1
+L 300 300 700 300 3 0 0 0 -1 -1
+A 700 600 300 270 180 3 0 0 0 -1 -1
+V 1050 600 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 1100 600 1300 600 1 0 1
+{
+T 1100 650 5 8 1 1 0 0 1
+pinnumber=3
+T 1100 550 5 8 0 1 0 2 1
+pinseq=3
+T 950 600 9 8 0 1 0 6 1
+pinlabel=Y
+T 950 600 5 8 0 1 0 8 1
+pintype=out
+}
+P 300 400 0 400 1 0 1
+{
+T 200 450 5 8 1 1 0 6 1
+pinnumber=2
+T 200 350 5 8 0 1 0 8 1
+pinseq=2
+T 350 400 9 8 0 1 0 0 1
+pinlabel=B
+T 350 400 5 8 0 1 0 2 1
+pintype=in
+}
+P 300 800 0 800 1 0 1
+{
+T 200 850 5 8 1 1 0 6 1
+pinnumber=1
+T 200 750 5 8 0 1 0 8 1
+pinseq=1
+T 350 800 9 8 0 1 0 0 1
+pinlabel=A
+T 350 800 5 8 0 1 0 2 1
+pintype=in
+}
+T 300 1200 5 10 0 0 0 0 1
+device=74132
+T 300 1400 5 10 0 0 0 0 1
+slot=1
+T 300 1600 5 10 0 0 0 0 1
+numslots=2
+T 300 1800 5 10 0 0 0 0 1
+slotdef=1:1,2,3,8,4
+T 300 2000 5 10 0 0 0 0 1
+slotdef=2:5,6,7,8,4
+L 400 450 600 450 3 0 0 0 -1 -1
+L 600 450 700 750 3 0 0 0 -1 -1
+L 500 450 600 750 3 0 0 0 -1 -1
+L 600 750 800 750 3 0 0 0 -1 -1
+T 700 1000 8 10 1 1 0 0 1
+refdes=U?
+T 300 2600 5 10 0 0 0 0 1
+footprint=DFN_HS
+T 300 2800 5 10 0 0 0 0 1
+description=2 NAND gates with 2 Schmitt-trigger inputs
+T 300 3000 5 10 0 0 0 0 1
+documentation=74AUP2G132.pdf
+T 300 2200 5 10 0 0 0 0 1
+value=74AUP2G132GD
+T 300 2400 5 10 0 0 0 0 1
+pn-digikey=568-5405-1-ND
+P 600 900 600 1200 1 0 1
+{
+T 595 950 5 8 1 1 0 0 1
+pinnumber=8
+T 550 1000 5 8 0 1 270 8 1
+pinseq=4
+T 595 900 9 6 1 1 0 5 1
+pinlabel=Vdd
+T 600 850 5 8 0 1 270 2 1
+pintype=pwr
+}
+P 600 300 600 0 1 0 1
+{
+T 595 150 5 8 1 1 0 0 1
+pinnumber=4
+T 650 200 5 8 0 1 90 8 1
+pinseq=5
+T 605 300 9 6 1 1 0 3 1
+pinlabel=Vss
+T 600 350 5 8 0 1 90 2 1
+pintype=pwr
+}

diff --git a/logic/74AUP2G132-1.sym~ b/logic/74AUP2G132-1.sym~
new file mode 100644 (file)
index 0000000..fa7f221
--- /dev/null
+++ b/logic/74AUP2G132-1.sym~
@@ -0,0 +1,71 @@
+v 20031231 1
+L 300 200 300 800 3 0 0 0 -1 -1
+L 300 800 700 800 3 0 0 0 -1 -1
+L 300 200 700 200 3 0 0 0 -1 -1
+A 700 500 300 270 180 3 0 0 0 -1 -1
+V 1050 500 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 1100 500 1300 500 1 0 1
+{
+T 1100 550 5 8 1 1 0 0 1
+pinnumber=3
+T 1100 450 5 8 0 1 0 2 1
+pinseq=3
+T 950 500 9 8 0 1 0 6 1
+pinlabel=Y
+T 950 500 5 8 0 1 0 8 1
+pintype=out
+}
+P 300 300 0 300 1 0 1
+{
+T 200 350 5 8 1 1 0 6 1
+pinnumber=2
+T 200 250 5 8 0 1 0 8 1
+pinseq=2
+T 350 300 9 8 0 1 0 0 1
+pinlabel=B
+T 350 300 5 8 0 1 0 2 1
+pintype=in
+}
+P 300 700 0 700 1 0 1
+{
+T 200 750 5 8 1 1 0 6 1
+pinnumber=1
+T 200 650 5 8 0 1 0 8 1
+pinseq=1
+T 350 700 9 8 0 1 0 0 1
+pinlabel=A
+T 350 700 5 8 0 1 0 2 1
+pintype=in
+}
+T 300 1100 5 10 0 0 0 0 1
+device=74132
+T 300 1300 5 10 0 0 0 0 1
+slot=1
+T 300 1500 5 10 0 0 0 0 1
+numslots=4
+T 300 1700 5 10 0 0 0 0 1
+slotdef=1:1,2,3
+T 300 1900 5 10 0 0 0 0 1
+slotdef=2:4,5,6
+T 300 2100 5 10 0 0 0 0 1
+slotdef=3:9,10,8
+T 300 2300 5 10 0 0 0 0 1
+slotdef=4:12,13,11
+L 400 350 600 350 3 0 0 0 -1 -1
+L 600 350 700 650 3 0 0 0 -1 -1
+L 500 350 600 650 3 0 0 0 -1 -1
+L 600 650 800 650 3 0 0 0 -1 -1
+T 300 900 8 10 1 1 0 0 1
+refdes=U?
+T 300 2500 5 10 0 0 0 0 1
+footprint=DIP14
+T 300 2700 5 10 0 0 0 0 1
+description=4 NAND gates with 2 Schmitt-trigger inputs
+T 300 2900 5 10 0 0 0 0 1
+net=Vcc:14
+T 300 3100 5 10 0 0 0 0 1
+net=GND:7
+T 300 0 9 8 1 0 0 0 1
+74132
+T 300 3300 5 10 0 0 0 0 1
+documentation=http://www-s.ti.com/sc/ds/sn74hc132.pdf

diff --git a/logic/74HC132-1.sym b/logic/74HC132-1.sym
deleted file mode 100644 (file)
index fa7f221..0000000
--- a/logic/74HC132-1.sym
+++ /dev/null
@@ -1,71 +0,0 @@
-v 20031231 1
-L 300 200 300 800 3 0 0 0 -1 -1
-L 300 800 700 800 3 0 0 0 -1 -1
-L 300 200 700 200 3 0 0 0 -1 -1
-A 700 500 300 270 180 3 0 0 0 -1 -1
-V 1050 500 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 1100 500 1300 500 1 0 1
-{
-T 1100 550 5 8 1 1 0 0 1
-pinnumber=3
-T 1100 450 5 8 0 1 0 2 1
-pinseq=3
-T 950 500 9 8 0 1 0 6 1
-pinlabel=Y
-T 950 500 5 8 0 1 0 8 1
-pintype=out
-}
-P 300 300 0 300 1 0 1
-{
-T 200 350 5 8 1 1 0 6 1
-pinnumber=2
-T 200 250 5 8 0 1 0 8 1
-pinseq=2
-T 350 300 9 8 0 1 0 0 1
-pinlabel=B
-T 350 300 5 8 0 1 0 2 1
-pintype=in
-}
-P 300 700 0 700 1 0 1
-{
-T 200 750 5 8 1 1 0 6 1
-pinnumber=1
-T 200 650 5 8 0 1 0 8 1
-pinseq=1
-T 350 700 9 8 0 1 0 0 1
-pinlabel=A
-T 350 700 5 8 0 1 0 2 1
-pintype=in
-}
-T 300 1100 5 10 0 0 0 0 1
-device=74132
-T 300 1300 5 10 0 0 0 0 1
-slot=1
-T 300 1500 5 10 0 0 0 0 1
-numslots=4
-T 300 1700 5 10 0 0 0 0 1
-slotdef=1:1,2,3
-T 300 1900 5 10 0 0 0 0 1
-slotdef=2:4,5,6
-T 300 2100 5 10 0 0 0 0 1
-slotdef=3:9,10,8
-T 300 2300 5 10 0 0 0 0 1
-slotdef=4:12,13,11
-L 400 350 600 350 3 0 0 0 -1 -1
-L 600 350 700 650 3 0 0 0 -1 -1
-L 500 350 600 650 3 0 0 0 -1 -1
-L 600 650 800 650 3 0 0 0 -1 -1
-T 300 900 8 10 1 1 0 0 1
-refdes=U?
-T 300 2500 5 10 0 0 0 0 1
-footprint=DIP14
-T 300 2700 5 10 0 0 0 0 1
-description=4 NAND gates with 2 Schmitt-trigger inputs
-T 300 2900 5 10 0 0 0 0 1
-net=Vcc:14
-T 300 3100 5 10 0 0 0 0 1
-net=GND:7
-T 300 0 9 8 1 0 0 0 1
-74132
-T 300 3300 5 10 0 0 0 0 1
-documentation=http://www-s.ti.com/sc/ds/sn74hc132.pdf

diff --git a/logic/74power-1.sym b/logic/74power-1.sym
deleted file mode 100644 (file)
index 44ae63f..0000000
--- a/logic/74power-1.sym
+++ /dev/null
@@ -1,37 +0,0 @@
-v 20041228 1
-L 0 200 0 800 3 0 0 0 -1 -1
-L 0 800 400 800 3 0 0 0 -1 -1
-T 200 1300 8 10 0 0 0 0 1
-numslots=0
-L 0 200 400 200 3 0 0 0 -1 -1
-P 200 200 200 -100 1 0 1
-{
-T 180 150 5 8 1 1 180 0 1
-pinnumber=7
-T 400 150 5 8 0 1 0 8 1
-pinseq=1
-T 40 240 9 8 1 1 0 0 1
-pinlabel=GND
-T 450 100 5 8 0 1 0 0 1
-pintype=pwr
-}
-P 200 800 200 1100 1 0 1
-{
-T 180 850 5 8 1 1 0 6 1
-pinnumber=14
-T 400 950 5 8 0 1 0 8 1
-pinseq=2
-T 60 750 9 8 1 1 180 6 1
-pinlabel=Vcc
-T 450 900 5 8 0 1 0 2 1
-pintype=pwr
-}
-T 300 900 8 10 1 1 0 0 1
-refdes=U?
-T 200 1450 8 10 0 0 0 0 1
-footprint=DIP14
-T 200 1650 8 10 0 0 0 0 1
-description=power symbol for gates with vcc on 14 and gnd on 7
-L 400 200 400 800 3 0 0 0 -1 -1
-T 500 600 8 10 1 1 0 0 1
-device=74??