use assembly for bootloader, start cleaning up Schemm version

diff --git a/msp4th/Makefile b/msp4th/Makefile
index e6afe8eecec3ffaa49725af5ed158984b5dc7a01..1c8a7c798c70c3a05cd15f65c72466f32a01fab2 100644 (file)
--- a/msp4th/Makefile
+++ b/msp4th/Makefile
@@ -10,13 +10,15 @@
 # 
 SHELL = /bin/bash
 
-TARGET     = main
-#MCU        = msp430f5529
-MCU        = msp2
-#MCU        = msp430x2013
+TARGET  = main
+#MCU     = msp430f5529
+MCU     = msp2
+#MCU     = msp430x2013
+CPU    = 430x
 # List all the source files here
 # eg if you have a source file foo.c then list it here
 SOURCES = main.c ns430-uart.c msp4th.c
+#ASMS = flashboot.s
 #SOURCES = main.c ns430-uart.c
 # Include are located in the Include directory
 #INCLUDES = -IInclude
@@ -26,7 +28,8 @@ INCLUDES = -I.
 #CFLAGS   = -mmcu=$(MCU) -g -Os -Wall -Wunused $(INCLUDES)   
 #CFLAGS   = -mmcu=$(MCU) -Werror -Wall -Wunused -mendup-at=main $(INCLUDES)
 #CFLAGS   = -mmcu=$(MCU) -g -Os -Werror -Wall -Wunused $(INCLUDES)
-CFLAGS   = -mmcu=$(MCU) -g -Os -Werror -Wall -Wunused $(INCLUDES)
+#CFLAGS   = -mmcu=$(MCU) -g -Os -Werror -Wall -Wunused $(INCLUDES)
+CFLAGS   = -mcpu=$(CPU) -g -Os -Werror -Wall -Wunused $(INCLUDES)
 #ASFLAGS  = -mmcu=$(MCU) -x assembler-with-cpp -Wa,-gstabs
 #ASFLAGS  = -mmcu=$(MCU) -Wall -Wunused -mendup-at=main $(INCLUDES)
 ASFLAGS  = -mmcu=$(MCU) -g -Os -Wall -Wunused $(INCLUDES)
@@ -52,7 +55,7 @@ MV       = mv
 DEPEND = $(SOURCES:.c=.d)
 
 # all the object files
-OBJECTS = $(SOURCES:.c=.o)
+OBJECTS = $(SOURCES:.c=.o) $(ASMS:.s=.o)
 
 # all asm files
 ASSEMBLYS = $(SOURCES:.c=.lst)
@@ -68,6 +71,14 @@ $(TARGET).elf: $(OBJECTS)
        $(SIZE) $(TARGET).elf
        @echo
 
+%.elf: %.o
+       @echo "Linking $@"
+       $(CC) $(OBJECTS) $(LDFLAGS) $(LIBS) -o $@
+       @echo
+       @echo ">>>> Size of Firmware <<<<"
+       $(SIZE) $(TARGET).elf
+       @echo
+
 %.hex: %.elf
        $(OBJCOPY) -O ihex $< $@
 
@@ -80,7 +91,11 @@ $(TARGET).elf: $(OBJECTS)
        $(MAKETXT) -O $@ -TITXT $< -I
        unix2dos $(TARGET).txt
 #  The above line is required for the DOS based TI BSL tool to be able to read the txt file generated from linux/unix systems.
-#
+
+%.o: %.s
+       @#msp430-gcc -mcpu=430x -D_GNU_ASSEMBLER_ -x assembler-with-cpp -c $< -o $@
+       msp430-gcc -mcpu=430x -D_GNU_ASSEMBLER_ -c $< -o $@
+
 %.o: %.c
        @echo "Compiling $<"
        $(CC) -c $(CFLAGS) -o $@ $<

diff --git a/msp4th/flashboot.s b/msp4th/flashboot.s
index 5cb2fb1c87030c7fd8e8539f2aed82c94567b059..46dd8693bcbc95e15ce7d60e27ff7d2ee07f47db 100644 (file)
--- a/msp4th/flashboot.s
+++ b/msp4th/flashboot.s
@@ -1,53 +1,46 @@
+.include "ns430-atoi.inc"
 
-00003000 <.sec1>:
+
+; msp430-gcc uses r[0,1,2] not pc,sp,sr
+#define pc r0
+#define sp r1
+#define sr r2
+
+
+
+;.global FlashLoadStart
+;FlashLoadStart:
 ;setup stack pointer to end of RAM
-    3000:       31 40 b0 ff     mov     #-80,sp ;#0xffb0
+    mov     #-80,r1 ;#0xffb0
 
 ;set PA(0) = 0 and enable output
 ;(should be) wired to flash /CS pin
-    3004:       92 43 08 1a     mov     #1,     &PAOUT  ;r3 As==01
-    3008:       82 43 0a 1a     mov     #0,     &PBOUT  ;r3 As==00
-    300c:       92 43 04 1a     mov     #1,     &PAOEN  ;r3 As==01
-    3010:       b2 40 00 80     mov     #-32768,&PBOEN  ;#0x8000
-    3014:       06 1a 
+    mov     #1,     &PAOUT
+    mov     #1,     &PAOEN
 
 ;enable peripherals:
 ; MISO0
 ; MOSI0
 ; SCLK0
-    3016:       b2 40 0e 00     mov     #14,    &PAPER  ;#0x000e
-    301a:       0c 1a 
-    301c:       0e 43           clr     r14             
-
-;check PA(8), setup oscillator
-; NOT CONTROLLING FABBED HARDWARE
-    301e:       b2 b0 00 01     bit     #256,   &PADSR  ;#0x0100
-    3022:       00 1a 
-    3024:       04 24           jz      $+10            ;abs 0x302e
-    3026:       1e 43           mov     #1,     r14     ;r3 As==01
-;from above
-; effect here is GPOUT0 = 0x00ca
-    3028:       b2 40 ca 00     mov     #202,   &0x2416 ;#0x00ca
-    302c:       16 24 
+;   output pins MOSI0 and SCLK0 are hard-wired as outputs
+;   when in peripheral mode, no need to change PAOUT
+    mov     #0x000e,&PAPER  ;#0x000e
 
 ;enable SPI0
 ; set CPOL,CPHA = 1,1
 ; 8-bit transfers
-    302e:       b2 40 70 00     mov     #112,   &SPI0_CR        ;#0x0070
-    3032:       00 20 
+    mov     #0x0070,&SPI0_CR
 ;bring flash /CS pin low
-    3034:       92 c3 08 1a     bic     #1,     &PAOUT  ;r3 As==01
+    bic     #1,     &PAOUT  ;r3 As==01
 ;release flash from deep sleep
-    3038:       b2 40 00 ab     mov     #-21760,&SPI0_TDR       ;#0xab00
-    303c:       04 20 
+    mov     #0xab00,&SPI0_TDR       ;#0xab00
 ; wait until command done sending
-    303e:       a2 b3 06 20     bit     #2,     &SPI0_SR        ;r3 As==10
-    3042:       fd 27           jz      $-4             ;abs 0x303e
+    bit     #1,     &SPI0_SR        ;r3 As==01
+    jz      $-4             ;abs 0x30ea
 ;now use 16-bit transfers
-    3044:       b2 40 f0 00     mov     #240,   &SPI0_CR        ;#0x00f0
-    3048:       00 20 
+    mov     #0x00f0,&SPI0_CR        ;#0x00f0
 ;de-select flash /CS
-    304a:       92 d3 08 1a     bis     #1,     &PAOUT  ;r3 As==01
+    bis     #1,     &PAOUT  ;r3 As==01
 
 ;check RAM for errors
 ;writes error count to 0x263e
@@ -56,135 +49,136 @@
 ;  (to read count later in early user code)
 ;  all function calls push/pop r9
 ;  user code may initially read r9 to get the RAM error count
-    304e:       09 43           clr     r9              
-    3050:       35 40 aa aa     mov     #-21846,r5      ;#0xaaaa
-    3054:       37 40 00 40     mov     #16384, r7      ;#RAMStart
-    3058:       38 40 00 60     mov     #24576, r8      ;#0x6000
-    305c:       18 83           dec     r8              
-    305e:       c8 1e 07 45     .rpt    r8
-                                movx    r5,     r7      
-    3062:       38 c0 0f 00     bic     #15,    r8      ;#0x000f
-    3066:       08 93           tst     r8              
-    3068:       f9 23           jnz     $-12            ;abs 0x305c
-    306a:       37 40 00 40     mov     #16384, r7      ;#RAMStart
-    306e:       38 40 00 60     mov     #24576, r8      ;#0x6000
-    3072:       0b 45           mov     r5,     r11     
-    3074:       5b 0e           rlam    #4,     r11     
-    3076:       0a 43           clr     r10             
-    3078:       18 83           dec     r8              
-    307a:       c8 18 3a 57     addx    @r7+,   r10     
-    307e:       0b 9a           cmp     r10,    r11     
-    3080:       01 24           jz      $+4             ;abs 0x3084
-    3082:       19 53           inc     r9              
-    3084:       38 c0 0f 00     bic     #15,    r8      ;#0x000f
-    3088:       08 93           tst     r8              
-    308a:       f5 23           jnz     $-20            ;abs 0x3076
-    308c:       35 93           cmp     #-1,    r5      ;r3 As==11
-    308e:       08 24           jz      $+18            ;abs 0x30a0
-    3090:       35 90 55 55     cmp     #21845, r5      ;#0x5555
-    3094:       03 24           jz      $+8             ;abs 0x309c
-    3096:       35 40 55 55     mov     #21845, r5      ;#0x5555
-    309a:       dc 3f           jmp     $-70            ;abs 0x3054
-    309c:       35 43           mov     #-1,    r5      ;r3 As==11
-    309e:       da 3f           jmp     $-74            ;abs 0x3054
-    30a0:       82 49 3e 26     mov     r9,     &0x263e 
+    clr     r9              
+    mov     #-21846,r5      ;#0xaaaa
+    mov     #16384, r7      ;#RAMStart
+    mov     #24576, r8      ;#0x6000
+    dec     r8              
+    .rpt    r8
+    movx    r5,     r7      
+    bic     #15,    r8      ;#0x000f
+    tst     r8              
+    jnz     $-12            ;abs 0x305c
+    mov     #16384, r7      ;#RAMStart
+    mov     #24576, r8      ;#0x6000
+    mov     r5,     r11     
+    rlam    #4,     r11     
+    clr     r10             
+    dec     r8              
+    addx    @r7+,   r10     
+    cmp     r10,    r11     
+    jz      $+4             ;abs 0x3084
+    inc     r9              
+    bic     #15,    r8      ;#0x000f
+    tst     r8              
+    jnz     $-20            ;abs 0x3076
+    cmp     #-1,    r5      ;r3 As==11
+    jz      $+18            ;abs 0x30a0
+    cmp     #21845, r5      ;#0x5555
+    jz      $+8             ;abs 0x309c
+    mov     #21845, r5      ;#0x5555
+    jmp     $-70            ;abs 0x3054
+    mov     #-1,    r5      ;r3 As==11
+    jmp     $-74            ;abs 0x3054
+    mov     r9,     &0x263e 
 
 ;check state of PA(7)
 ; PA.7 low -> invoke bootstrap loader
 ; PA.7 high -> copy code from flash
-    30a4:       b2 b0 80 00     bit     #128,   &PADSR  ;#0x0080
-    30a8:       00 1a 
-    30aa:       4e 24           jz      $+158   ;#gotoMain    ;abs 0x3148
+    bit     #128,   &PADSR  ;#0x0080
+    ;jz      $+158   ;#gotoMain    ;abs 0x3148
+    jz      4f   ;#gotoMain    ;abs 0x3148
 
-CopyFromFlash:
+;CopyFromFlash:
+1:
 ;setup CRC
-    30ac:       82 43 04 00     mov     #0,     &CRCINIRES    ;r3 As==00
-;no effect, port B is NC
-    30b0:       82 43 0a 1a     mov     #0,     &PBOUT  ;r3 As==00
-    30b4:       b2 40 00 80     mov     #-32768,&PBOEN  ;#0x8000
-    30b8:       06 1a 
+    mov     #0,     &CRCINIRES    ;r3 As==00
 ;check state of PA.9 (aka I2C SCL)
 ;r13 holds the flag
 ; PA.9 low -> do not byteswap
 ; PA.9 high -> byteswap words from flash
-    30ba:       0d 43           clr     r13             
-    30bc:       b2 b0 00 02     bit     #512,   &PADSR  ;#0x0200
-    30c0:       00 1a 
-    30c2:       01 24           jz      $+4             ;abs 0x30c6
-    30c4:       1d 43           mov     #1,     r13     ;r3 As==01
-;no effect, port B is NC
-    30c6:       82 43 06 1a     mov     #0,     &PBOEN  ;r3 As==00
+    clr     r13             
+    bit     #512,   &PADSR  ;#0x0200
+    jz      $+4             ;abs 0x30c6
+    mov     #1,     r13     ;r3 As==01
 ;r7 holds start of RAM address
 ;r8 (end of RAM)+1
-    30ca:       37 40 00 40     mov     #16384, r7      ;#RAMStart
-    30ce:       88 01 00 00     mova    #0x10000,r8     
+    mov     #16384, r7      ;#RAMStart
+    mova    #0x10000,r8     
 ;select flash /CS line
-    30d2:       92 c3 08 1a     bic     #1,     &PAOUT  ;r3 As==01
+    bic     #1,     &PAOUT  ;r3 As==01
 ;flash command 0x03 - read data bytes
 ;                00 - address MSB
 ;                r7 - address low word (=RAMStart)
-    30d6:       b2 40 00 03     mov     #768,   &SPI0_TDR       ;#0x0300
-    30da:       04 20 
-    30dc:       82 47 04 20     mov     r7,     &SPI0_TDR       
+    mov     #768,   &SPI0_TDR       ;#0x0300
+    mov     r7,     &SPI0_TDR       
 ;wait for transmissions to finish
-    30e0:       92 b3 06 20     bit     #1,     &SPI0_SR        ;r3 As==01
-    30e4:       fd 27           jz      $-4             ;abs 0x30e0
+    bit     #1,     &SPI0_SR        ;r3 As==01
+    jz      $-4             ;abs 0x30e0
 ;send 0x0000 to flash
-    30e6:       82 43 04 20     mov     #0,     &SPI0_TDR       ;r3 As==00
-    30ea:       92 b3 06 20     bit     #1,     &SPI0_SR        ;r3 As==01
-    30ee:       fd 27           jz      $-4             ;abs 0x30ea
+    mov     #0,     &SPI0_TDR       ;r3 As==00
+    bit     #1,     &SPI0_SR        ;r3 As==01
+    jz      $-4             ;abs 0x30ea
 ;send second 0x0000 to flash
-    30f0:       82 43 04 20     mov     #0,     &SPI0_TDR       ;r3 As==00
+    mov     #0,     &SPI0_TDR       ;r3 As==00
 ;clear status register (any r/w does so)
-    30f4:       82 43 06 20     mov     #0,     &SPI0_SR        ;r3 As==00
+    mov     #0,     &SPI0_SR        ;r3 As==00
 
-MainLoop1:
+;MainLoop1:
+2:
 ;wait for return word
-    30f8:       a2 b2 06 20     bit     #4,     &SPI0_SR        ;r2 As==10
-    30fc:       fd 27           jz      $-4             ;abs 0x30f8
+    bit     #4,     &SPI0_SR        ;r2 As==10
+    jz      $-4             ;abs 0x30f8
 ;store received word
-    30fe:       15 42 02 20     mov     &SPI0_RDR,r5    
+    mov     &SPI0_RDR,r5    
 ;send another 0x0000 to SPI
-    3102:       82 43 04 20     mov     #0,     &SPI0_TDR       ;r3 As==00
+    mov     #0,     &SPI0_TDR       ;r3 As==00
 ;?swap bytes?
-    3106:       0d 93           tst     r13             
-    3108:       01 24           jz      $+4     ;#SPINoSwap        ;abs 0x310c
-    310a:       85 10           swpb    r5              
-SPINoSwap:
+    tst     r13             
+    ;jz      $+4     ;#SPINoSwap        ;abs 0x310c
+    jz      3f     ;#SPINoSwap        ;abs 0x310c
+    swpb    r5              
+
+;SPINoSwap:
+3:
 ;copy received word to RAM address in r7 (ini=RAMStart)
-    310c:       87 45 00 00     mov     r5,     0(r7)   ;CRCDI_L(r7)
+    mov     r5,     0(r7)   ;CRCDI_L(r7)
 ;compute CRC of data
 ;increment r7
-    3110:       b2 47 00 00     mov     @r7+,   &CRCDI        
+    mov     @r7+,   &CRCDI        
 ;?reached end of RAM?
-    3114:       d8 07           cmpa    r7,     r8      
-    3116:       f0 23           jnz     $-30    ;#MainLoop1     ;abs 0x30f8
+    cmpa    r7,     r8      
+    ;jnz     $-30    ;#MainLoop1     ;abs 0x30f8
+    jnz     2b   ;#MainLoop1     ;abs 0x30f8
 
 ;wait for last transmission to finish
-    3118:       a2 b3 06 20     bit     #2,     &SPI0_SR        ;r3 As==10
-    311c:       fd 27           jz      $-4             ;abs 0x3118
+    bit     #2,     &SPI0_SR        ;r3 As==10
+    jz      $-4             ;abs 0x3118
 ;deselect flash /CS line
-    311e:       92 d3 08 1a     bis     #1,     &PAOUT  ;r3 As==01
+    bis     #1,     &PAOUT  ;r3 As==01
 
 ;enable SPI0
 ; set CPOL,CPHA = 1,1
 ; 8-bit transfers
-    3122:       b2 40 70 00     mov     #112,   &SPI0_CR        ;#0x0070
-    3126:       00 20 
+    mov     #112,   &SPI0_CR        ;#0x0070
 ;select flash /CS line
-    3128:       92 c3 08 1a     bic     #1,     &PAOUT  ;r3 As==01
+    bic     #1,     &PAOUT  ;r3 As==01
 ;flash command: deep power down
-    312c:       b2 40 00 b9     mov     #-18176,&SPI0_TDR       ;#0xb900
-    3130:       04 20 
+    mov     #-18176,&SPI0_TDR       ;#0xb900
 ;wait for completion
 ;deselect flash /CS line
-    3132:       a2 b3 06 20     bit     #2,     &SPI0_SR        ;r3 As==10
-    3136:       fd 27           jz      $-4             ;abs 0x3132
-    3138:       92 d3 08 1a     bis     #1,     &PAOUT  ;r3 As==01
+    bit     #2,     &SPI0_SR        ;r3 As==10
+    jz      $-4             ;abs 0x3132
+    bis     #1,     &PAOUT  ;r3 As==01
 
 ;disable PA peripherals
-    313c:       82 43 0c 1a     mov     #0,     &PAPER  ;r3 As==00
+    mov     #0,     &PAPER  ;r3 As==00
 ;disable PA output drivers
-    3140:       82 43 04 1a     mov     #0,     &PAOEN  ;r3 As==00
+    mov     #0,     &PAOEN  ;r3 As==00
 ;execute user code starting at address pointed to by 0xfffe
-    3144:       10 42 fe ff     br      &0xfffe 
+    br      &0xfffe 
+
+4:
+
+; syntax from:  git://github.com/vim-scripts/msp.vim.git
+; vim: ft=msp

diff --git a/msp4th/main.c b/msp4th/main.c
index dfad9bc08412e62df6e50dd6841c9647058ed579..bff1b205715cbb57c6f3c983ba995af584d8fa19 100644 (file)
--- a/msp4th/main.c
+++ b/msp4th/main.c
@@ -56,76 +56,43 @@ static void __inline__ eint(void){
 
 
 
+/*
+ * SPECIAL BOOTLOADER CALLING
+ *
+ * We *do not* want to 'call' the initial bootloader.  Such a call instruction
+ * attempts to use the stack, which is in RAM -- whose health is unknown.  The
+ * functionality must use ROM code and registers only.  * Declaring as an
+ * inline function and .include'ing the ASM code is a hop and skip to ensure
+ * this happens.
+ *
+ * As a consequence, the ASM file must use local labels only -- of the form
+ *  N:
+ *      mov foo, bar
+ *
+ *  where N is an integer, referenced as
+ *
+ *      jmp Nb
+ *
+ *  where the label is searched for forwards or backwards according to the
+ *  suffix Nf or Nb.
+ */
+void __inline__ flashbootASM(void)
+{
+    asm(".include \"flashboot.s\"");
+}
+
+
 
 int main(void){
 
     int16_t tmp;
 
-    register int16_t data asm("r5");
-    register int16_t *addr asm("r7");
+    //register int16_t data asm("r5");
+    //register int16_t *addr asm("r7");
 
+    flashbootASM();
     dint();
 
-
-    PAOUT = 0x0001;
-    PAOEN = 0x0001;
-    PAPER = 0x000e;
-
-
-    // check pin state
-    if ((PADSR & (1 << 7)) == 0) {
-        // msp4th interp
-    } else {
-        // load flash image into RAM
-
-        // setup SPI mode 3, 8b transfers
-        SPI0_CR = (SPI_CPHA | SPI_CPOL | SPI_EN);
-
-        // /CS, pin[0] low
-        PAOUT &= ~(1 << 0);
-
-        // release flash from deep sleep
-        SPI0_TDR = 0xab00;
-        while ((SPI0_SR & TDRE) == 0) { /* wait */ }
-
-        // change to 16-bit transfers
-        SPI0_CR = (SPI_DL | SPI_CPHA | SPI_CPOL | SPI_EN);
-
-        // /CS high
-        PAOUT |= (1 << 0);
-
-        // /CS low
-        PAOUT &= ~(1 << 0);
-        // send flash command
-        // 0x03 - read data bytes
-        // 0x00 - address MSB
-        SPI0_TDR = 0x0300;
-        SPI0_TDR = RAMStart;
-        while ((SPI0_SR & TDRE) == 0) { /* wait */ }
-
-        SPI0_TDR = 0x0000;
-        while ((SPI0_SR & TDRE) == 0) { /* wait */ }
-
-        SPI0_TDR = 0x0000;
-        while ((SPI0_SR & TDRE) == 0) { /* wait */ }
-
-        // clear status
-        SPI0_SR = 0;
-
-        for (addr=RAMStart; addr <= RAMStart+RAMSize-2; addr++) {
-            while ((SPI0_SR & TDRE) == 0) { /* wait */ }
-
-            // store data
-            data = SPI0_RDR;
-            // keep receiving (by sending zeros)
-            SPI0_TDR = 0x0000;
-
-            addr = data;
-        }
-    }
-
-
-
     // chip setup for UART0 use
     PAPER = 0x0030;
     PAOUT = 0x0000;

diff --git a/msp4th/ns430-atoi.inc b/msp4th/ns430-atoi.inc
new file mode 120000 (symlink)
index 0000000..bed3546
--- /dev/null
+++ b/msp4th/ns430-atoi.inc
@@ -0,0 +1 @@
+../ns430-atoi.inc
\ No newline at end of file