WIP adc/dac

diff --git a/sch-pcb/devboard/atoi-6.sch b/sch-pcb/devboard/atoi-6.sch
index b0a3907fb008af10da5021ae8591cfc784228150..ddce70c4d71b80ed992b0597f9e668e2189c9f3e 100644 (file)
--- a/sch-pcb/devboard/atoi-6.sch
+++ b/sch-pcb/devboard/atoi-6.sch
@@ -12,16 +12,16 @@ fname=$Id: $
 T 49900 41300 5 14 1 1 0 0 1
 title=AtoI - ADC / DAC
 T 50600 40300 5 10 1 1 0 6 1
-pagenum=1
+pagenum=6
 T 52100 40300 5 10 1 1 0 6 1
-pageof=1
+pageof=??
 }
 C 42300 44600 1 0 0 ads8201-1.sym
 {
 T 45200 49400 5 10 0 0 0 0 1
 footprint=QFN_24N__TI
 T 43900 47800 5 10 1 1 0 3 1
-refdes=U?
+refdes=U600
 }
 N 40400 49600 41700 49600 4
 {
@@ -63,251 +63,251 @@ N 40400 46800 42300 46800 4
 T 40500 46800 5 10 1 1 0 0 1
 netname=ADC0_IN7
 }
-C 50300 44300 1 0 0 EMBEDDEDdac8568-1.sym
+C 50600 45700 1 0 0 EMBEDDEDdac8568-1.sym
 [
-B 50600 44600 2300 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-V 50550 48200 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 50300 48200 50500 48200 1 0 0
+B 50900 46000 2300 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+V 50850 49600 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 50600 49600 50800 49600 1 0 0
 {
-T 50650 48200 9 10 1 1 0 1 1
+T 50950 49600 9 10 1 1 0 1 1
 pinlabel=\_LDAC\_
-T 50500 48250 5 8 1 1 0 6 1
+T 50800 49650 5 8 1 1 0 6 1
 pinnumber=1
-T 50500 48250 5 8 0 1 0 6 1
+T 50800 49650 5 8 0 1 0 6 1
 pinseq=1
-T 50500 48250 9 10 0 1 0 6 1
+T 50800 49650 9 10 0 1 0 6 1
 pintype=in
 }
-V 50550 47800 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 50300 47800 50500 47800 1 0 0
+V 50850 49200 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 50600 49200 50800 49200 1 0 0
 {
-T 50650 47800 9 10 1 1 0 1 1
+T 50950 49200 9 10 1 1 0 1 1
 pinlabel=\_SYNC\_
-T 50500 47850 5 8 1 1 0 6 1
+T 50800 49250 5 8 1 1 0 6 1
 pinnumber=2
-T 50500 47850 5 8 0 1 0 6 1
+T 50800 49250 5 8 0 1 0 6 1
 pinseq=2
-T 50500 47850 9 10 0 1 0 6 1
+T 50800 49250 9 10 0 1 0 6 1
 pintype=in
 }
-P 51800 49400 51800 49100 1 0 0
+P 52100 50800 52100 50500 1 0 0
 {
-T 51800 49050 9 10 1 1 90 7 1
+T 52100 50450 9 10 1 1 90 7 1
 pinlabel=AVDD
-T 51850 49150 5 8 1 1 0 0 1
+T 52150 50550 5 8 1 1 0 0 1
 pinnumber=3
-T 51850 49150 5 8 0 1 0 0 1
+T 52150 50550 5 8 0 1 0 0 1
 pinseq=3
-T 51700 44350 9 10 0 1 0 6 1
+T 52000 45750 9 10 0 1 0 6 1
 pintype=pwr
 }
-P 50300 47000 50600 47000 1 0 0
+P 50600 48400 50900 48400 1 0 0
 {
-T 50650 47000 9 10 1 1 0 1 1
+T 50950 48400 9 10 1 1 0 1 1
 pinlabel=Vout0
-T 50500 47050 5 8 1 1 0 6 1
+T 50800 48450 5 8 1 1 0 6 1
 pinnumber=4
-T 50500 47050 5 8 0 1 0 6 1
+T 50800 48450 5 8 0 1 0 6 1
 pinseq=4
-T 50500 47050 9 10 0 1 0 6 1
+T 50800 48450 9 10 0 1 0 6 1
 pintype=out
 }
-P 50300 46600 50600 46600 1 0 0
+P 50600 48000 50900 48000 1 0 0
 {
-T 50650 46600 9 10 1 1 0 1 1
+T 50950 48000 9 10 1 1 0 1 1
 pinlabel=Vout2
-T 50500 46650 5 8 1 1 0 6 1
+T 50800 48050 5 8 1 1 0 6 1
 pinnumber=5
-T 50500 46650 5 8 0 1 0 6 1
+T 50800 48050 5 8 0 1 0 6 1
 pinseq=5
-T 50500 46650 9 10 0 1 0 6 1
+T 50800 48050 9 10 0 1 0 6 1
 pintype=out
 }
-P 50300 46200 50600 46200 1 0 0
+P 50600 47600 50900 47600 1 0 0
 {
-T 50650 46200 9 10 1 1 0 1 1
+T 50950 47600 9 10 1 1 0 1 1
 pinlabel=Vout4
-T 50500 46250 5 8 1 1 0 6 1
+T 50800 47650 5 8 1 1 0 6 1
 pinnumber=6
-T 50500 46250 5 8 0 1 0 6 1
+T 50800 47650 5 8 0 1 0 6 1
 pinseq=6
-T 50500 46250 9 10 0 1 0 6 1
+T 50800 47650 9 10 0 1 0 6 1
 pintype=out
 }
-P 50300 45800 50600 45800 1 0 0
+P 50600 47200 50900 47200 1 0 0
 {
-T 50650 45800 9 10 1 1 0 1 1
+T 50950 47200 9 10 1 1 0 1 1
 pinlabel=Vout6
-T 50500 45850 5 8 1 1 0 6 1
+T 50800 47250 5 8 1 1 0 6 1
 pinnumber=7
-T 50500 45850 5 8 0 1 0 6 1
+T 50800 47250 5 8 0 1 0 6 1
 pinseq=7
-T 50500 45850 9 10 0 1 0 6 1
+T 50800 47250 9 10 0 1 0 6 1
 pintype=out
 }
-P 50300 45000 50600 45000 1 0 0
+P 50600 46400 50900 46400 1 0 0
 {
-T 50650 45000 9 10 1 1 0 1 1
+T 50950 46400 9 10 1 1 0 1 1
 pinlabel=Vref
-T 50500 45050 5 8 1 1 0 6 1
+T 50800 46450 5 8 1 1 0 6 1
 pinnumber=8
-T 50500 45050 5 8 0 1 0 6 1
+T 50800 46450 5 8 0 1 0 6 1
 pinseq=8
-T 50500 45050 9 10 0 1 0 6 1
+T 50800 46450 9 10 0 1 0 6 1
 pintype=out
 }
-V 52950 45000 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 53200 45000 53000 45000 1 0 0
+V 53250 46400 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 53500 46400 53300 46400 1 0 0
 {
-T 52850 45000 9 10 1 1 0 7 1
+T 53150 46400 9 10 1 1 0 7 1
 pinlabel=\_CLR\_
-T 53000 45050 5 8 1 1 0 0 1
+T 53300 46450 5 8 1 1 0 0 1
 pinnumber=9
-T 53000 45050 5 8 0 1 0 0 1
+T 53300 46450 5 8 0 1 0 0 1
 pinseq=9
-T 52800 45050 9 10 0 1 0 6 1
+T 53100 46450 9 10 0 1 0 6 1
 pintype=in
 }
-P 53200 45800 52900 45800 1 0 0
+P 53500 47200 53200 47200 1 0 0
 {
-T 52850 45800 9 10 1 1 0 7 1
+T 53150 47200 9 10 1 1 0 7 1
 pinlabel=Vout7
-T 53000 45850 5 8 1 1 0 0 1
+T 53300 47250 5 8 1 1 0 0 1
 pinnumber=10
-T 53000 45850 5 8 0 1 0 0 1
+T 53300 47250 5 8 0 1 0 0 1
 pinseq=10
-T 52800 45850 9 10 0 1 0 6 1
+T 53100 47250 9 10 0 1 0 6 1
 pintype=out
 }
-P 53200 46200 52900 46200 1 0 0
+P 53500 47600 53200 47600 1 0 0
 {
-T 52850 46200 9 10 1 1 0 7 1
+T 53150 47600 9 10 1 1 0 7 1
 pinlabel=Vout5
-T 53000 46250 5 8 1 1 0 0 1
+T 53300 47650 5 8 1 1 0 0 1
 pinnumber=11
-T 53000 46250 5 8 0 1 0 0 1
+T 53300 47650 5 8 0 1 0 0 1
 pinseq=11
-T 52800 46250 9 10 0 1 0 6 1
+T 53100 47650 9 10 0 1 0 6 1
 pintype=out
 }
-P 53200 46600 52900 46600 1 0 0
+P 53500 48000 53200 48000 1 0 0
 {
-T 52850 46600 9 10 1 1 0 7 1
+T 53150 48000 9 10 1 1 0 7 1
 pinlabel=Vout3
-T 53000 46650 5 8 1 1 0 0 1
+T 53300 48050 5 8 1 1 0 0 1
 pinnumber=12
-T 53000 46650 5 8 0 1 0 0 1
+T 53300 48050 5 8 0 1 0 0 1
 pinseq=12
-T 52800 46650 9 10 0 1 0 6 1
+T 53100 48050 9 10 0 1 0 6 1
 pintype=out
 }
-P 53200 47000 52900 47000 1 0 0
+P 53500 48400 53200 48400 1 0 0
 {
-T 52850 47000 9 10 1 1 0 7 1
+T 53150 48400 9 10 1 1 0 7 1
 pinlabel=Vout1
-T 53000 47050 5 8 1 1 0 0 1
+T 53300 48450 5 8 1 1 0 0 1
 pinnumber=13
-T 53000 47050 5 8 0 1 0 0 1
+T 53300 48450 5 8 0 1 0 0 1
 pinseq=13
-T 52800 47050 9 10 0 1 0 6 1
+T 53100 48450 9 10 0 1 0 6 1
 pintype=out
 }
-P 51800 44300 51800 44600 1 0 0
+P 52100 45700 52100 46000 1 0 0
 {
-T 51800 44650 9 10 1 1 90 1 1
+T 52100 46050 9 10 1 1 90 1 1
 pinlabel=GND
-T 51850 44550 5 8 1 1 0 2 1
+T 52150 45950 5 8 1 1 0 2 1
 pinnumber=14
-T 51850 44550 5 8 0 1 0 2 1
+T 52150 45950 5 8 0 1 0 2 1
 pinseq=14
-T 51700 44750 9 10 0 1 0 6 1
+T 52000 46150 9 10 0 1 0 6 1
 pintype=pwr
 }
-P 53200 47800 52900 47800 1 0 0
+P 53500 49200 53200 49200 1 0 0
 {
-T 52850 47800 9 10 1 1 0 7 1
+T 53150 49200 9 10 1 1 0 7 1
 pinlabel=DIN
-T 53000 47850 5 8 1 1 0 0 1
+T 53300 49250 5 8 1 1 0 0 1
 pinnumber=15
-T 53000 47850 5 8 0 1 0 0 1
+T 53300 49250 5 8 0 1 0 0 1
 pinseq=15
-T 52800 47850 9 10 0 1 0 6 1
+T 53100 49250 9 10 0 1 0 6 1
 pintype=in
 }
-P 53200 48200 52900 48200 1 0 0
+P 53500 49600 53200 49600 1 0 0
 {
-T 52850 48200 9 10 1 1 0 7 1
+T 53150 49600 9 10 1 1 0 7 1
 pinlabel=SCLK
-T 53000 48250 5 8 1 1 0 0 1
+T 53300 49650 5 8 1 1 0 0 1
 pinnumber=16
-T 53000 48250 5 8 0 1 0 0 1
+T 53300 49650 5 8 0 1 0 0 1
 pinseq=16
-T 52800 48250 9 10 0 1 0 6 1
+T 53100 49650 9 10 0 1 0 6 1
 pintype=in
 }
-T 52900 49200 9 10 0 0 0 0 1
+T 53200 50600 9 10 0 0 0 0 1
 document=dac8586.pdf
-T 52900 49400 9 10 0 0 0 0 1
+T 53200 50800 9 10 0 0 0 0 1
 footprint=TSSOP_16N__TI
-T 51800 48000 9 10 0 1 0 3 1
+T 52100 49400 9 10 0 1 0 3 1
 refdes=U?
-T 51800 47600 9 10 1 1 0 3 1
+T 52100 49000 9 10 1 1 0 3 1
 DAC8568
 ]
 {
-T 52800 42300 5 10 0 0 0 0 1
+T 53100 43700 5 10 0 0 0 0 1
 footprint=TSSOP_16N__TI
-T 51800 48000 5 10 1 1 0 3 1
-refdes=U200
+T 52100 49400 5 10 1 1 0 3 1
+refdes=U601
 }
-N 50300 47000 49400 47000 4
+N 50600 48400 49700 48400 4
 {
-T 49500 47000 5 10 1 1 0 0 1
+T 49800 48400 5 10 1 1 0 0 1
 netname=DAC0_0
 }
-C 51600 49400 1 0 0 generic-power.sym
+C 51900 50800 1 0 0 generic-power.sym
 {
-T 51800 49650 5 10 1 1 0 3 1
+T 52100 51050 5 10 1 1 0 3 1
 net=AVdd_dev:1
 }
-C 51700 44000 1 0 0 gnd-1.sym
+C 52000 45400 1 0 0 gnd-1.sym
 {
-T 51600 43850 5 10 1 1 0 0 1
+T 51900 45250 5 10 1 1 0 0 1
 net=AVSS:1
 }
-N 50300 46600 49400 46600 4
+N 50600 48000 49700 48000 4
 {
-T 49500 46600 5 10 1 1 0 0 1
+T 49800 48000 5 10 1 1 0 0 1
 netname=DAC0_2
 }
-N 50300 46200 49400 46200 4
+N 50600 47600 49700 47600 4
 {
-T 49500 46200 5 10 1 1 0 0 1
+T 49800 47600 5 10 1 1 0 0 1
 netname=DAC0_4
 }
-N 50300 45800 49400 45800 4
+N 50600 47200 49700 47200 4
 {
-T 49500 45800 5 10 1 1 0 0 1
+T 49800 47200 5 10 1 1 0 0 1
 netname=DAC0_06
 }
-N 54100 47000 53200 47000 4
+N 54400 48400 53500 48400 4
 {
-T 53400 47000 5 10 1 1 0 0 1
+T 53700 48400 5 10 1 1 0 0 1
 netname=DAC0_1
 }
-N 54100 46600 53200 46600 4
+N 54400 48000 53500 48000 4
 {
-T 53400 46600 5 10 1 1 0 0 1
+T 53700 48000 5 10 1 1 0 0 1
 netname=DAC0_3
 }
-N 54100 46200 53200 46200 4
+N 54400 47600 53500 47600 4
 {
-T 53400 46200 5 10 1 1 0 0 1
+T 53700 47600 5 10 1 1 0 0 1
 netname=DAC0_5
 }
-N 54100 45800 53200 45800 4
+N 54400 47200 53500 47200 4
 {
-T 53400 45800 5 10 1 1 0 0 1
+T 53700 47200 5 10 1 1 0 0 1
 netname=DAC0_7
 }
 C 40500 46700 1 0 0 flag-2.sym
@@ -378,3 +378,356 @@ T 55800 46700 5 10 1 1 0 0 1
 netname=DAC0_7
 }
 C 55700 46600 1 0 0 flag-2.sym
+N 43700 44600 43700 43600 4
+N 43700 43600 40400 43600 4
+{
+T 40500 43600 5 10 1 1 0 0 1
+netname=SPI1_MOSI
+}
+N 43300 44600 43300 44000 4
+N 43300 44000 40400 44000 4
+{
+T 40500 44000 5 10 1 1 0 0 1
+netname=CS_ADC0
+}
+N 44100 44600 44100 43200 4
+N 44100 43200 40400 43200 4
+{
+T 40500 43200 5 10 1 1 0 0 1
+netname=SPI1_MISO
+}
+C 40500 43900 1 0 0 flag-2.sym
+C 40500 43500 1 0 0 flag-2.sym
+C 40500 43100 1 0 0 flag-2.sym
+C 44400 44300 1 0 0 gnd-1.sym
+{
+T 44300 44150 5 10 1 1 0 0 1
+net=AVSS:1
+}
+N 42900 44600 42900 44400 4
+N 42900 44400 40400 44400 4
+{
+T 40500 44400 5 10 1 1 0 0 1
+netname=SPI1_SCLK
+}
+C 40500 44300 1 0 0 flag-2.sym
+N 54700 49600 53500 49600 4
+{
+T 53700 49600 5 10 1 1 0 0 1
+netname=SPI1_SCLK
+}
+C 46300 48400 1 0 0 resistor-3.sym
+{
+T 46400 49400 5 10 0 0 0 0 1
+device=RESISTOR
+T 46600 49000 5 10 1 1 0 0 1
+refdes=R600
+T 46600 48800 5 10 1 1 0 0 1
+value=1k
+}
+N 44900 49400 46400 49400 4
+N 46400 49400 46400 49300 4
+N 45500 46800 45800 46800 4
+N 45500 47200 45800 47200 4
+N 45800 46800 45800 47300 4
+C 48700 46300 1 90 0 jumper.sym
+{
+T 48300 46600 5 10 1 1 90 0 1
+refdes=J602
+T 48500 46600 5 8 0 1 90 0 1
+footprint=JMP_2PIN
+T 46600 46400 5 8 0 0 90 0 1
+symversion=1.0
+T 48400 46600 5 8 0 1 90 0 1
+value=Jumper
+T 46400 46400 5 8 0 0 90 0 1
+value=jumper
+}
+N 48000 46400 45500 46400 4
+C 46100 46000 1 0 0 generic-power.sym
+{
+T 46300 46250 5 10 1 1 0 3 1
+net=AVdd_dev:1
+}
+N 45500 46000 46300 46000 4
+N 45500 45600 45700 45600 4
+N 45700 45400 45700 46000 4
+C 45500 44500 1 0 0 capacitor-3.sym
+{
+T 45500 45500 5 10 0 0 0 0 1
+device=CAPACITOR
+T 45800 45100 5 10 1 1 0 0 1
+refdes=C602
+T 45500 45700 5 10 0 0 0 0 1
+symversion=0.1
+T 45800 44700 5 10 1 1 0 0 1
+value=100n
+}
+C 45600 44200 1 0 0 gnd-1.sym
+{
+T 45500 44050 5 10 1 1 0 0 1
+net=AVSS:1
+}
+N 42300 46000 40400 46000 4
+{
+T 40600 46000 5 10 1 1 0 0 1
+netname=RST
+}
+C 40500 45900 1 0 0 flag-2.sym
+C 47300 46400 1 0 0 capacitor-3.sym
+{
+T 47300 47400 5 10 0 0 0 0 1
+device=CAPACITOR
+T 47600 47000 5 10 1 1 0 0 1
+refdes=C601
+T 47300 47600 5 10 0 0 0 0 1
+symversion=0.1
+T 47600 46600 5 10 1 1 0 0 1
+value=10u
+}
+N 47500 47300 45800 47300 4
+C 46200 44500 1 0 0 capacitor-3.sym
+{
+T 46200 45500 5 10 0 0 0 0 1
+device=CAPACITOR
+T 46500 45100 5 10 1 1 0 0 1
+refdes=C603
+T 46200 45700 5 10 0 0 0 0 1
+symversion=0.1
+T 46500 44700 5 10 1 1 0 0 1
+value=10u
+}
+N 46400 44500 45700 44500 4
+N 46400 45400 46400 45500 4
+N 46400 45500 45700 45500 4
+C 46600 47000 1 0 0 gnd-1.sym
+{
+T 46500 46850 5 10 1 1 0 0 1
+net=AVSS:1
+}
+C 46200 47300 1 0 0 capacitor-3.sym
+{
+T 46200 48300 5 10 0 0 0 0 1
+device=CAPACITOR
+T 46500 47900 5 10 1 1 0 0 1
+refdes=C600
+T 46200 48500 5 10 0 0 0 0 1
+symversion=0.1
+T 46500 47500 5 10 1 1 0 0 1
+value=10u
+}
+N 45500 48000 45900 48000 4
+N 45900 48000 45900 48300 4
+N 45900 48300 46400 48300 4
+N 46400 48200 46400 48400 4
+N 53500 49200 54700 49200 4
+{
+T 53700 49200 5 10 1 1 0 0 1
+netname=SPI1_MOSI
+}
+N 50600 49200 49600 49200 4
+{
+T 49700 49200 5 10 1 1 0 0 1
+netname=CS_DAC0
+}
+C 49500 49300 1 0 1 jumper-3.sym
+{
+T 49600 51200 5 8 0 0 0 6 1
+device=JUMPER-1xUM
+T 49400 49900 5 10 1 1 0 6 1
+refdes=J601
+T 49400 50200 5 10 0 1 0 6 1
+value=JMP
+T 49400 49100 5 8 0 1 0 6 1
+footprint=1x3PIN
+}
+N 50600 49600 49500 49600 4
+C 48800 48900 1 0 0 gnd-1.sym
+{
+T 48700 48750 5 10 1 1 0 0 1
+net=AVSS:1
+}
+N 49100 49400 48900 49400 4
+N 48900 49400 48900 49200 4
+C 50500 42100 1 0 0 opamp-dual-1.sym
+{
+T 49600 42800 5 10 0 0 0 0 1
+device=DUAL_OPAMP
+T 50100 41400 5 10 0 1 0 0 1
+footprint=SOT23__Maxim
+T 49600 43000 5 10 0 0 0 0 1
+symversion=0.2
+T 50100 41200 5 10 0 0 0 0 1
+slot=2
+T 50600 42900 5 10 1 1 0 0 1
+refdes=U603
+T 51200 42800 5 10 1 0 0 0 1
+slot=2
+T 51200 42200 5 10 1 1 0 0 1
+value=MAX9912
+}
+C 50500 43900 1 0 0 opamp-dual-1.sym
+{
+T 52600 45600 5 10 0 0 0 0 1
+device=DUAL_OPAMP
+T 53100 44200 5 10 0 1 0 0 1
+footprint=SOT23__Maxim
+T 52600 45800 5 10 0 0 0 0 1
+symversion=0.2
+T 50600 44700 5 10 1 1 0 0 1
+refdes=U602
+T 51200 44600 5 10 1 0 0 0 1
+slot=1
+T 51200 44000 5 10 1 1 0 0 1
+value=MAX9912
+}
+N 52100 44300 51500 44300 4
+N 51800 44300 51800 45200 4
+N 50500 45200 50500 44500 4
+N 50500 42700 50500 43400 4
+N 51800 42500 51800 43400 4
+N 52100 42500 51500 42500 4
+C 51200 42900 1 0 1 generic-power.sym
+{
+T 51000 43150 5 10 1 1 0 3 1
+net=AVdd_dev:1
+}
+C 50900 41800 1 0 0 gnd-1.sym
+{
+T 51000 41950 5 10 1 1 0 0 1
+net=AVSS:1
+}
+C 51200 44700 1 0 1 generic-power.sym
+{
+T 51000 44950 5 10 1 1 0 3 1
+net=AVdd_dev:1
+}
+C 50900 43600 1 0 0 gnd-1.sym
+{
+T 51000 43750 5 10 1 1 0 0 1
+net=AVSS:1
+}
+N 51800 45200 50500 45200 4
+N 51800 43400 50500 43400 4
+C 48700 43400 1 0 0 resistor-3.sym
+{
+T 48800 44400 5 10 0 0 0 0 1
+device=RESISTOR
+T 49000 44000 5 10 1 1 0 0 1
+refdes=R601
+T 49000 43800 5 10 1 1 0 0 1
+value=100k
+}
+C 49400 42300 1 0 0 capacitor-3.sym
+{
+T 49400 43300 5 10 0 0 0 0 1
+device=CAPACITOR
+T 49700 42900 5 10 1 1 0 0 1
+refdes=C605
+T 49400 43500 5 10 0 0 0 0 1
+symversion=0.1
+T 49700 42500 5 10 1 1 0 0 1
+value=100n
+}
+C 48700 42300 1 0 0 resistor-3.sym
+{
+T 48800 43300 5 10 0 0 0 0 1
+device=RESISTOR
+T 49000 42900 5 10 1 1 0 0 1
+refdes=R602
+T 49000 42700 5 10 1 1 0 0 1
+value=100k
+}
+C 53000 44200 1 0 1 resistor-1.sym
+{
+T 52700 44600 5 10 0 0 0 6 1
+device=RESISTOR
+T 52800 44500 5 10 1 1 0 6 1
+refdes=R603
+T 52400 44500 5 10 1 1 0 6 1
+value=10
+}
+C 53000 42400 1 0 1 resistor-1.sym
+{
+T 52700 42800 5 10 0 0 0 6 1
+device=RESISTOR
+T 52800 42700 5 10 1 1 0 6 1
+refdes=R604
+T 52400 42700 5 10 1 1 0 6 1
+value=10
+}
+N 48800 43400 48800 43200 4
+N 49600 43200 49600 43300 4
+N 48800 43300 50200 43300 4
+N 48800 44300 48800 46400 4
+N 50500 44100 50200 44100 4
+N 50200 42300 50200 44100 4
+N 50200 42300 50500 42300 4
+C 48700 41800 1 0 0 gnd-1.sym
+{
+T 48600 41650 5 10 1 1 0 0 1
+net=AVSS:1
+}
+N 48800 42300 48800 42100 4
+N 49600 42300 49600 42200 4
+N 49600 42200 48800 42200 4
+N 53000 42500 54000 42500 4
+N 53000 44300 54200 44300 4
+{
+T 53900 44300 5 10 1 1 0 6 1
+netname=Vref/2
+}
+C 45000 49900 1 0 0 jumper-3.sym
+{
+T 44900 51800 5 8 0 0 0 0 1
+device=JUMPER-1xUM
+T 45100 50500 5 10 1 1 0 0 1
+refdes=J600
+T 45100 50800 5 10 0 1 0 0 1
+value=JMP
+T 45100 49700 5 8 0 1 0 0 1
+footprint=1x3PIN
+}
+C 45500 49700 1 0 0 gnd-1.sym
+{
+T 45400 49550 5 10 1 1 0 0 1
+net=AVSS:1
+}
+N 45600 50000 45400 50000 4
+N 45000 50200 44500 50200 4
+N 44500 50200 44500 49400 4
+N 50600 46400 48600 46400 4
+C 49800 45400 1 0 0 capacitor-3.sym
+{
+T 49800 46400 5 10 0 0 0 0 1
+device=CAPACITOR
+T 50100 46000 5 10 1 1 0 0 1
+refdes=C604
+T 49800 46600 5 10 0 0 0 0 1
+symversion=0.1
+T 50100 45600 5 10 1 1 0 0 1
+value=10u
+}
+C 49900 45100 1 0 0 gnd-1.sym
+{
+T 49800 44950 5 10 1 1 0 0 1
+net=AVSS:1
+}
+N 50000 46300 50000 46400 4
+N 56600 45000 55500 45000 4
+{
+T 55800 45000 5 10 1 1 0 0 1
+netname=CMI
+}
+C 55700 44900 1 0 0 flag-2.sym
+C 55500 44700 1 0 1 jumper-3.sym
+{
+T 55600 46600 5 8 0 0 0 6 1
+device=JUMPER-1xUM
+T 55400 45300 5 10 1 1 0 6 1
+refdes=J603
+T 55400 45600 5 10 0 1 0 6 1
+value=JMP
+T 55400 44500 5 8 0 1 0 6 1
+footprint=1x3PIN
+}