tweaks to tuner to get ISR freq right
authordrowe67 <drowe67@01035d8c-6547-0410-b346-abe4f91aad63>
Tue, 24 Feb 2015 04:49:56 +0000 (04:49 +0000)
committerdrowe67 <drowe67@01035d8c-6547-0410-b346-abe4f91aad63>
Tue, 24 Feb 2015 04:49:56 +0000 (04:49 +0000)
git-svn-id: https://svn.code.sf.net/p/freetel/code@2046 01035d8c-6547-0410-b346-abe4f91aad63

codec2-dev/stm32/src/stm32f4_adc_tuner.c
codec2-dev/stm32/src/tuner_ut.c

index 95505f7ff66958cae062c40074793435cf281469..b8e3b2a6feca75c6b043d691d8321662c9376d9f 100644 (file)
@@ -86,15 +86,18 @@ static void tim2_config(void)
   APB1 prescaler is different from 1 (see system_stm32f4xx.c and Fig
   13 clock tree figure in DM0031020.pdf).
 
-     Sample rate Fs = 2*PCLK1/TIM_ClockDivision 
-                    = (HCLK/2)/TIM_ClockDivision
+     Sample rate Fs = 2*PCLK1/)TIM_ClockDivision+1)
+                    = (HCLK/2)/(TIM_ClockDivision+1)
                     
+  Note from David: The +1 was discovered empirically, still not sure
+  if it's right.
+
   ----------------------------------------------------------- */
 
   /* Time base configuration */
 
   TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); 
-  TIM_TimeBaseStructure.TIM_Period = 42;          
+  TIM_TimeBaseStructure.TIM_Period = 41;          
   TIM_TimeBaseStructure.TIM_Prescaler = 0;       
   TIM_TimeBaseStructure.TIM_ClockDivision = 0;    
   TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;  
@@ -110,7 +113,7 @@ static void tim2_config(void)
 }
 
 
-void adc_configure(){
+void adc_configure() {
     ADC_InitTypeDef  ADC_init_structure; 
     GPIO_InitTypeDef GPIO_initStructre; 
     DMA_InitTypeDef  DMA_InitStructure;
index 153eae4515549f1f64a5faf49336f34a26ef9270..788e5cfd705ecc0bb4dad4431cef8f53bd42c5a0 100644 (file)
@@ -83,5 +83,7 @@ int main(void) {
 \r
     printf("finished! %d\n", adc_overflow1);\r
     fclose(ftuner);\r
+\r
+    while(1); /* keep ISR running */\r
 }\r
 \r