msp4th: flash loader testing

diff --git a/msp4th/flashboot.s b/msp4th/flashboot.s
index 1331bfb9de9118008e98c8bc9af6ae164ed9214a..1f84f461b759bb860554993dde7e05de603eeabe 100644 (file)
--- a/msp4th/flashboot.s
+++ b/msp4th/flashboot.s
@@ -1,18 +1,17 @@
 .include "ns430-atoi.inc"
 
 
-; msp430-gcc uses r[0,1,2] not pc,sp,sr
-#define pc r0
-#define sp r1
-#define sr r2
+.equ StackStart, 0xff00
+.equ RAMCodeStart, 0x4000
 
+; msp430-gcc uses r[0,1,2] not pc,sp,sr
 
 
 ; setup stack pointer to end of RAM
 ; not used in this asm code, but arguably necessary for proper init of the C
 ; environment later
-    mov     #0xffb0,r1
-
+    mov     #StackStart,r1
+    dint
 
 
 ; NOTE: we wakeup the flash chip (M25PE80) now to ensure we allow the
@@ -28,26 +27,35 @@
 ; SCLK0
 ;   output pins MOSI0 and SCLK0 are hard-wired as outputs
 ;   when in peripheral mode, no need to change PAOUT
-    mov     #0x000e,&PAPER  ;#0x000e
+    mov     #0x000e,&PAPER
 
 ;enable SPI0
 ; set CPOL,CPHA = 1,1
 ; 8-bit transfers
     mov     #0x0070,&SPI0_CR
 ;bring flash /CS pin low
-    bic     #1,     &PAOUT  ;r3 As==01
+    bic     #1,     &PAOUT
 ;release flash from deep sleep
-    mov     #0xab00,&SPI0_TDR       ;#0xab00
+    mov     #0xab00,&SPI0_TDR
 ; wait until command done sending
 1:
-    bit     #1,     &SPI0_SR        ;r3 As==01
+    bit     #1,     &SPI0_SR
     jz      1b
 ;now use 16-bit transfers
-    mov     #0x00f0,&SPI0_CR        ;#0x00f0
+    mov     #0x00f0,&SPI0_CR
 ;de-select flash /CS
-    bis     #1,     &PAOUT  ;r3 As==01
-
-
+    bis     #1,     &PAOUT
+
+/*
+ * old code.
+ * I (Dan) do not quite fully understand what's going on.
+ * The idea is to write/read RAM and accumulate the number of bad positions
+ * in r9, for reading in later user code.
+ *
+ * If we *really* need a RAM tester, we can code one in ASM and run from the
+ * beginning of RAM.  Writing user code to read r9 kindof implies *some* RAM is
+ * working...
+ *
 ;check RAM for errors
 ; r9 is not modified later in bootcode
 ;  (to read count later in early user code)
@@ -84,104 +92,108 @@
     jmp     $-70            ;abs 0x3054
     mov     #-1,    r5      ;r3 As==11
     jmp     $-74            ;abs 0x3054
+*/
 
 ;check state of PA(7)
-; PA.7 low -> invoke bootstrap loader
+; PA.7 low -> continue into default msp4th interpreter aka main()
 ; PA.7 high -> copy code from flash
-    bit     #128,   &PADSR  ;#0x0080
-    ;jz      $+158   ;#gotoMain    ;abs 0x3148
-    jz      4f   ;#gotoMain    ;abs 0x3148
+    bit     #0x0080,&PADSR
+    jz      8f  ;#ContinueMain
 
 ;CopyFromFlash:
-1:
 ;setup CRC
-    mov     #0,     &CRCINIRES    ;r3 As==00
+    mov     #0,     &CRCINIRES
 ;check state of PA.9 (aka I2C SCL)
 ;r13 holds the flag
 ; PA.9 low -> do not byteswap
 ; PA.9 high -> byteswap words from flash
     clr     r13             
-    bit     #512,   &PADSR  ;#0x0200
-    jz      $+4             ;abs 0x30c6
-    mov     #1,     r13     ;r3 As==01
+    bit     #0x0200,&PADSR
+    jz      2f
+    mov     #1,     r13
+2:
 ;r7 holds start of RAM address
 ;r8 (end of RAM)+1
-    mov     #16384, r7      ;#RAMStart
-    mova    #0x10000,r8     
+;    mov     #RAMStart,r7
+    mov     #0x6000,r7
+    mova    #(RAMStart+RAMSize),r8
 ;select flash /CS line
-    bic     #1,     &PAOUT  ;r3 As==01
+    bic     #1,     &PAOUT
 ;flash command 0x03 - read data bytes
 ;                00 - address MSB
 ;                r7 - address low word (=RAMStart)
-    mov     #768,   &SPI0_TDR       ;#0x0300
-    mov     r7,     &SPI0_TDR       
+    mov     #0x0300,&SPI0_TDR
+;    mov     r7,     &SPI0_TDR
+    mov     #0x4000,&SPI0_TDR
 ;wait for transmissions to finish
-    bit     #1,     &SPI0_SR        ;r3 As==01
-    jz      $-4             ;abs 0x30e0
+3:
+    bit     #1,     &SPI0_SR
+    jz      3b
 ;send 0x0000 to flash
-    mov     #0,     &SPI0_TDR       ;r3 As==00
-    bit     #1,     &SPI0_SR        ;r3 As==01
-    jz      $-4             ;abs 0x30ea
+    mov     #0,     &SPI0_TDR
+4:
+    bit     #1,     &SPI0_SR
+    jz      4b
 ;send second 0x0000 to flash
-    mov     #0,     &SPI0_TDR       ;r3 As==00
+    mov     #0,     &SPI0_TDR
 ;clear status register (any r/w does so)
-    mov     #0,     &SPI0_SR        ;r3 As==00
+    mov     #0,     &SPI0_SR
 
 ;MainLoop1:
-2:
 ;wait for return word
-    bit     #4,     &SPI0_SR        ;r2 As==10
-    jz      $-4             ;abs 0x30f8
+5:
+    bit     #4,     &SPI0_SR
+    jz      5b
 ;store received word
     mov     &SPI0_RDR,r5    
 ;send another 0x0000 to SPI
-    mov     #0,     &SPI0_TDR       ;r3 As==00
+    mov     #0,     &SPI0_TDR
 ;?swap bytes?
     tst     r13             
-    ;jz      $+4     ;#SPINoSwap        ;abs 0x310c
-    jz      3f     ;#SPINoSwap        ;abs 0x310c
+    jz      6f     ;#SPINoSwap
     swpb    r5              
 
 ;SPINoSwap:
-3:
+6:
 ;copy received word to RAM address in r7 (ini=RAMStart)
-    mov     r5,     0(r7)   ;CRCDI_L(r7)
+    mov     r5,     0(r7)
 ;compute CRC of data
 ;increment r7
     mov     @r7+,   &CRCDI        
 ;?reached end of RAM?
     cmpa    r7,     r8      
-    ;jnz     $-30    ;#MainLoop1     ;abs 0x30f8
-    jnz     2b   ;#MainLoop1     ;abs 0x30f8
+    jnz     5b   ;#MainLoop1
 
 ;wait for last transmission to finish
-    bit     #2,     &SPI0_SR        ;r3 As==10
-    jz      $-4             ;abs 0x3118
+    bit     #2,     &SPI0_SR
+    jz      $-4
 ;deselect flash /CS line
-    bis     #1,     &PAOUT  ;r3 As==01
+    bis     #1,     &PAOUT
 
 ;enable SPI0
 ; set CPOL,CPHA = 1,1
 ; 8-bit transfers
-    mov     #112,   &SPI0_CR        ;#0x0070
+    mov     #0x0070,&SPI0_CR
 ;select flash /CS line
     bic     #1,     &PAOUT  ;r3 As==01
 ;flash command: deep power down
-    mov     #-18176,&SPI0_TDR       ;#0xb900
+    mov     #0xb900,&SPI0_TDR
 ;wait for completion
 ;deselect flash /CS line
-    bit     #2,     &SPI0_SR        ;r3 As==10
-    jz      $-4             ;abs 0x3132
-    bis     #1,     &PAOUT  ;r3 As==01
+7:
+    bit     #2,     &SPI0_SR
+    jz      7b
+    bis     #1,     &PAOUT
 
 ;disable PA peripherals
-    mov     #0,     &PAPER  ;r3 As==00
+    mov     #0,     &PAPER
 ;disable PA output drivers
-    mov     #0,     &PAOEN  ;r3 As==00
+    mov     #0,     &PAOEN
 ;execute user code starting at address pointed to by 0xfffe
-    br      &0xfffe 
+;    br      &0xfffe
 
-4:
+;ContinueMain
+8:
 
 ; syntax from:  git://github.com/vim-scripts/msp.vim.git
 ; vim: ft=msp

diff --git a/msp4th/main.c b/msp4th/main.c
index 44e11c7d1756c31f4f7ecc99b07e156dc9d42f38..19c739fdcb99290519c61f4e6e50c672e6fff982 100644 (file)
--- a/msp4th/main.c
+++ b/msp4th/main.c
@@ -21,7 +21,7 @@
  *      YE BE WARNED
  */
 void __attribute__ ((naked)) _reset_vector__(void) {
-  __asm__ __volatile__("mov #0xffb0,r1"::);
+  __asm__ __volatile__("mov #0xff00,r1"::);
   __asm__ __volatile__("br #main"::);
 }
 
@@ -85,6 +85,7 @@ int main(void){
 
     dint();
 
+
     // chip setup for UART0 use
     PAPER = 0x0030;
     PAOUT = 0x0000;
@@ -96,6 +97,8 @@ int main(void){
     // a read clears the register -- ready for TX/RX
     tmp = UART0_SR;
 
+    uart_puts((str_t *)"in main()!");
+
 
     /*
      * Startup and run msp4th interp

diff --git a/msp4th/msp4th.c b/msp4th/msp4th.c
index 9d5a475d1b15f3dfe8400b67f547e9180c1d19c3..2dba1d1da4d04880d45ffea0968b7ef8dfcb75a3 100644 (file)
--- a/msp4th/msp4th.c
+++ b/msp4th/msp4th.c
@@ -3,6 +3,13 @@
  * TODO:
  *  - use enum for VM opcodes
  *  - speed up pop/pushMathStack (need bounds check??)
+ *  - UART usage is blocking, convert to interrupt-based
+ *  - allow configurable user-code space
+ *      prog[], cmdList[], progOps[]
+ *      array locations come from a vector table instead of hard-coded
+ *      locations in bss space.  init_msp4th() populates the pointers
+ *      with values from the table (which can be user-written to effect
+ *      changing user code sizes.
  *
  */
 
@@ -494,14 +501,17 @@ int16_t popMathStack(void)
     int16_t i;
     int16_t j;
 
-    j = mathStack[0];
-
-    for (i=1; i < mathStackDepth; i++) {
-        mathStack[i-1] = mathStack[i];
-    }
 
     if (mathStackDepth > 0) {
+        j = mathStack[0];
+
+        for (i=1; i < mathStackDepth; i++) {
+            mathStack[i-1] = mathStack[i];
+        }
+
         mathStackDepth--;
+    } else {
+        j = 0;
     }
 
     return(j);
@@ -1215,7 +1225,7 @@ void init_msp4th(void)
     }
 
     getLine();
-    pushMathStack(0);
+    //pushMathStack(0);
 }