Split out AtoI digital power into symbol

diff --git a/sch-pcb/devboard/atoi-1.sch b/sch-pcb/devboard/atoi-1.sch
index 6c897093fde4fd3e5c6e83852d33c5c0d65562fb..1ac00e9e7ff72b8798385c6d83f0577d37fcf744 100644 (file)
--- a/sch-pcb/devboard/atoi-1.sch
+++ b/sch-pcb/devboard/atoi-1.sch
@@ -1,11 +1,4 @@
 v 20111231 2
-C 39600 47400 1 0 0 wb430-1.sym
-{
-T 46000 57500 5 10 1 1 0 3 1
-refdes=U?
-T 46000 57100 5 10 1 1 0 3 1
-footprint=SEMPAC_12x12_100A.fp
-}
 C 56800 48400 1 0 0 ads8201-1.sym
 {
 T 59700 53200 5 10 0 0 0 0 1
@@ -53,225 +46,274 @@ N 55800 50600 56800 50600 4
 T 55900 50600 5 10 1 1 0 0 1
 netname=ADC0_IN7
 }
-C 51200 55400 1 0 0 EMBEDDEDdac8568-1.sym
+C 52000 53300 1 0 0 EMBEDDEDdac8568-1.sym
 [
-B 51500 55700 2300 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-V 51450 59300 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 51200 59300 51400 59300 1 0 0
+B 52300 53600 2300 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+V 52250 57200 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 52000 57200 52200 57200 1 0 0
 {
-T 51550 59300 9 10 1 1 0 1 1
+T 52350 57200 9 10 1 1 0 1 1
 pinlabel=\_LDAC\_
-T 51400 59350 5 8 1 1 0 6 1
+T 52200 57250 5 8 1 1 0 6 1
 pinnumber=1
-T 51400 59350 5 8 0 1 0 6 1
+T 52200 57250 5 8 0 1 0 6 1
 pinseq=1
-T 51400 59350 9 10 0 1 0 6 1
+T 52200 57250 9 10 0 1 0 6 1
 pintype=in
 }
-V 51450 58900 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 51200 58900 51400 58900 1 0 0
+V 52250 56800 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 52000 56800 52200 56800 1 0 0
 {
-T 51550 58900 9 10 1 1 0 1 1
+T 52350 56800 9 10 1 1 0 1 1
 pinlabel=\_SYNC\_
-T 51400 58950 5 8 1 1 0 6 1
+T 52200 56850 5 8 1 1 0 6 1
 pinnumber=2
-T 51400 58950 5 8 0 1 0 6 1
+T 52200 56850 5 8 0 1 0 6 1
 pinseq=2
-T 51400 58950 9 10 0 1 0 6 1
+T 52200 56850 9 10 0 1 0 6 1
 pintype=in
 }
-P 52700 60500 52700 60200 1 0 0
+P 53500 58400 53500 58100 1 0 0
 {
-T 52700 60150 9 10 1 1 90 7 1
+T 53500 58050 9 10 1 1 90 7 1
 pinlabel=AVDD
-T 52750 60250 5 8 1 1 0 0 1
+T 53550 58150 5 8 1 1 0 0 1
 pinnumber=3
-T 52750 60250 5 8 0 1 0 0 1
+T 53550 58150 5 8 0 1 0 0 1
 pinseq=3
-T 52600 55450 9 10 0 1 0 6 1
+T 53400 53350 9 10 0 1 0 6 1
 pintype=pwr
 }
-P 51200 58100 51500 58100 1 0 0
+P 52000 56000 52300 56000 1 0 0
 {
-T 51550 58100 9 10 1 1 0 1 1
+T 52350 56000 9 10 1 1 0 1 1
 pinlabel=Vout0
-T 51400 58150 5 8 1 1 0 6 1
+T 52200 56050 5 8 1 1 0 6 1
 pinnumber=4
-T 51400 58150 5 8 0 1 0 6 1
+T 52200 56050 5 8 0 1 0 6 1
 pinseq=4
-T 51400 58150 9 10 0 1 0 6 1
+T 52200 56050 9 10 0 1 0 6 1
 pintype=out
 }
-P 51200 57700 51500 57700 1 0 0
+P 52000 55600 52300 55600 1 0 0
 {
-T 51550 57700 9 10 1 1 0 1 1
+T 52350 55600 9 10 1 1 0 1 1
 pinlabel=Vout2
-T 51400 57750 5 8 1 1 0 6 1
+T 52200 55650 5 8 1 1 0 6 1
 pinnumber=5
-T 51400 57750 5 8 0 1 0 6 1
+T 52200 55650 5 8 0 1 0 6 1
 pinseq=5
-T 51400 57750 9 10 0 1 0 6 1
+T 52200 55650 9 10 0 1 0 6 1
 pintype=out
 }
-P 51200 57300 51500 57300 1 0 0
+P 52000 55200 52300 55200 1 0 0
 {
-T 51550 57300 9 10 1 1 0 1 1
+T 52350 55200 9 10 1 1 0 1 1
 pinlabel=Vout4
-T 51400 57350 5 8 1 1 0 6 1
+T 52200 55250 5 8 1 1 0 6 1
 pinnumber=6
-T 51400 57350 5 8 0 1 0 6 1
+T 52200 55250 5 8 0 1 0 6 1
 pinseq=6
-T 51400 57350 9 10 0 1 0 6 1
+T 52200 55250 9 10 0 1 0 6 1
 pintype=out
 }
-P 51200 56900 51500 56900 1 0 0
+P 52000 54800 52300 54800 1 0 0
 {
-T 51550 56900 9 10 1 1 0 1 1
+T 52350 54800 9 10 1 1 0 1 1
 pinlabel=Vout6
-T 51400 56950 5 8 1 1 0 6 1
+T 52200 54850 5 8 1 1 0 6 1
 pinnumber=7
-T 51400 56950 5 8 0 1 0 6 1
+T 52200 54850 5 8 0 1 0 6 1
 pinseq=7
-T 51400 56950 9 10 0 1 0 6 1
+T 52200 54850 9 10 0 1 0 6 1
 pintype=out
 }
-P 51200 56100 51500 56100 1 0 0
+P 52000 54000 52300 54000 1 0 0
 {
-T 51550 56100 9 10 1 1 0 1 1
+T 52350 54000 9 10 1 1 0 1 1
 pinlabel=Vref
-T 51400 56150 5 8 1 1 0 6 1
+T 52200 54050 5 8 1 1 0 6 1
 pinnumber=8
-T 51400 56150 5 8 0 1 0 6 1
+T 52200 54050 5 8 0 1 0 6 1
 pinseq=8
-T 51400 56150 9 10 0 1 0 6 1
+T 52200 54050 9 10 0 1 0 6 1
 pintype=out
 }
-V 53850 56100 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 54100 56100 53900 56100 1 0 0
+V 54650 54000 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 54900 54000 54700 54000 1 0 0
 {
-T 53750 56100 9 10 1 1 0 7 1
+T 54550 54000 9 10 1 1 0 7 1
 pinlabel=\_CLR\_
-T 53900 56150 5 8 1 1 0 0 1
+T 54700 54050 5 8 1 1 0 0 1
 pinnumber=9
-T 53900 56150 5 8 0 1 0 0 1
+T 54700 54050 5 8 0 1 0 0 1
 pinseq=9
-T 53700 56150 9 10 0 1 0 6 1
+T 54500 54050 9 10 0 1 0 6 1
 pintype=in
 }
-P 54100 56900 53800 56900 1 0 0
+P 54900 54800 54600 54800 1 0 0
 {
-T 53750 56900 9 10 1 1 0 7 1
+T 54550 54800 9 10 1 1 0 7 1
 pinlabel=Vout7
-T 53900 56950 5 8 1 1 0 0 1
+T 54700 54850 5 8 1 1 0 0 1
 pinnumber=10
-T 53900 56950 5 8 0 1 0 0 1
+T 54700 54850 5 8 0 1 0 0 1
 pinseq=10
-T 53700 56950 9 10 0 1 0 6 1
+T 54500 54850 9 10 0 1 0 6 1
 pintype=out
 }
-P 54100 57300 53800 57300 1 0 0
+P 54900 55200 54600 55200 1 0 0
 {
-T 53750 57300 9 10 1 1 0 7 1
+T 54550 55200 9 10 1 1 0 7 1
 pinlabel=Vout5
-T 53900 57350 5 8 1 1 0 0 1
+T 54700 55250 5 8 1 1 0 0 1
 pinnumber=11
-T 53900 57350 5 8 0 1 0 0 1
+T 54700 55250 5 8 0 1 0 0 1
 pinseq=11
-T 53700 57350 9 10 0 1 0 6 1
+T 54500 55250 9 10 0 1 0 6 1
 pintype=out
 }
-P 54100 57700 53800 57700 1 0 0
+P 54900 55600 54600 55600 1 0 0
 {
-T 53750 57700 9 10 1 1 0 7 1
+T 54550 55600 9 10 1 1 0 7 1
 pinlabel=Vout3
-T 53900 57750 5 8 1 1 0 0 1
+T 54700 55650 5 8 1 1 0 0 1
 pinnumber=12
-T 53900 57750 5 8 0 1 0 0 1
+T 54700 55650 5 8 0 1 0 0 1
 pinseq=12
-T 53700 57750 9 10 0 1 0 6 1
+T 54500 55650 9 10 0 1 0 6 1
 pintype=out
 }
-P 54100 58100 53800 58100 1 0 0
+P 54900 56000 54600 56000 1 0 0
 {
-T 53750 58100 9 10 1 1 0 7 1
+T 54550 56000 9 10 1 1 0 7 1
 pinlabel=Vout1
-T 53900 58150 5 8 1 1 0 0 1
+T 54700 56050 5 8 1 1 0 0 1
 pinnumber=13
-T 53900 58150 5 8 0 1 0 0 1
+T 54700 56050 5 8 0 1 0 0 1
 pinseq=13
-T 53700 58150 9 10 0 1 0 6 1
+T 54500 56050 9 10 0 1 0 6 1
 pintype=out
 }
-P 52700 55400 52700 55700 1 0 0
+P 53500 53300 53500 53600 1 0 0
 {
-T 52700 55750 9 10 1 1 90 1 1
+T 53500 53650 9 10 1 1 90 1 1
 pinlabel=GND
-T 52750 55650 5 8 1 1 0 2 1
+T 53550 53550 5 8 1 1 0 2 1
 pinnumber=14
-T 52750 55650 5 8 0 1 0 2 1
+T 53550 53550 5 8 0 1 0 2 1
 pinseq=14
-T 52600 55850 9 10 0 1 0 6 1
+T 53400 53750 9 10 0 1 0 6 1
 pintype=pwr
 }
-P 54100 58900 53800 58900 1 0 0
+P 54900 56800 54600 56800 1 0 0
 {
-T 53750 58900 9 10 1 1 0 7 1
+T 54550 56800 9 10 1 1 0 7 1
 pinlabel=DIN
-T 53900 58950 5 8 1 1 0 0 1
+T 54700 56850 5 8 1 1 0 0 1
 pinnumber=15
-T 53900 58950 5 8 0 1 0 0 1
+T 54700 56850 5 8 0 1 0 0 1
 pinseq=15
-T 53700 58950 9 10 0 1 0 6 1
+T 54500 56850 9 10 0 1 0 6 1
 pintype=in
 }
-P 54100 59300 53800 59300 1 0 0
+P 54900 57200 54600 57200 1 0 0
 {
-T 53750 59300 9 10 1 1 0 7 1
+T 54550 57200 9 10 1 1 0 7 1
 pinlabel=SCLK
-T 53900 59350 5 8 1 1 0 0 1
+T 54700 57250 5 8 1 1 0 0 1
 pinnumber=16
-T 53900 59350 5 8 0 1 0 0 1
+T 54700 57250 5 8 0 1 0 0 1
 pinseq=16
-T 53700 59350 9 10 0 1 0 6 1
+T 54500 57250 9 10 0 1 0 6 1
 pintype=in
 }
-T 53800 60300 9 10 0 0 0 0 1
+T 54600 58200 9 10 0 0 0 0 1
 document=dac8586.pdf
-T 53800 60500 9 10 0 0 0 0 1
+T 54600 58400 9 10 0 0 0 0 1
 footprint=TSSOP_16N__TI
-T 52700 59100 9 10 0 1 0 3 1
+T 53500 57000 9 10 0 1 0 3 1
 refdes=U?
-T 52700 58700 9 10 1 1 0 3 1
+T 53500 56600 9 10 1 1 0 3 1
 DAC8568
 ]
 {
-T 53700 53400 5 10 0 0 0 0 1
+T 54500 51300 5 10 0 0 0 0 1
 footprint=TSSOP_16N__TI
-T 52700 59100 5 10 1 1 0 3 1
+T 53500 57000 5 10 1 1 0 3 1
 refdes=U200
 }
-N 51200 57700 50300 57700 4
-{
-T 50500 57700 5 10 1 1 0 0 1
-netname=INA
-}
-N 54100 57700 55100 57700 4
+N 52000 56000 51100 56000 4
 {
-T 54500 57700 5 10 1 1 0 0 1
-netname=INB
+T 51200 56000 5 10 1 1 0 0 1
+netname=DAC0_0
 }
-C 52500 60500 1 0 0 generic-power.sym
+C 53300 58400 1 0 0 generic-power.sym
 {
-T 52700 60750 5 10 1 1 0 3 1
+T 53500 58650 5 10 1 1 0 3 1
 net=AVdd_dev:1
 }
-C 52600 55100 1 0 0 gnd-1.sym
+C 53400 53000 1 0 0 gnd-1.sym
 {
-T 52500 54950 5 10 1 1 0 0 1
+T 53300 52850 5 10 1 1 0 0 1
 net=AVSS:1
 }
-N 51200 57300 50300 57300 4
+N 52000 55600 51100 55600 4
+{
+T 51200 55600 5 10 1 1 0 0 1
+netname=DAC0_2
+}
+N 52000 55200 51100 55200 4
+{
+T 51200 55200 5 10 1 1 0 0 1
+netname=DAC0_4
+}
+N 52000 54800 51100 54800 4
+{
+T 51200 54800 5 10 1 1 0 0 1
+netname=DAC0_06
+}
+N 55800 56000 54900 56000 4
 {
-T 50500 57300 5 10 1 1 0 0 1
-netname=CMI
+T 55100 56000 5 10 1 1 0 0 1
+netname=DAC0_1
+}
+N 55800 55600 54900 55600 4
+{
+T 55100 55600 5 10 1 1 0 0 1
+netname=DAC0_3
+}
+N 55800 55200 54900 55200 4
+{
+T 55100 55200 5 10 1 1 0 0 1
+netname=DAC0_5
+}
+N 55800 54800 54900 54800 4
+{
+T 55100 54800 5 10 1 1 0 0 1
+netname=DAC0_7
+}
+C 44100 46400 0 0 0 title-wa-85x110.sym
+{
+T 54000 47000 15 10 1 1 0 0 1
+date=---
+T 57800 47000 15 10 1 1 0 0 1
+rev=---
+T 57800 46700 15 10 1 1 0 0 1
+auth=DJW
+T 54000 47300 15 8 1 1 0 0 1
+fname=$Id: $
+T 54000 47700 15 14 1 1 0 0 1
+title=TITLE
+T 54700 46700 15 10 1 1 0 6 1
+pagenum=1
+T 56200 46700 15 10 1 1 0 6 1
+pageof=1
+}
+C 45100 47400 1 0 0 wb430-1.sym
+{
+T 47800 56300 5 10 1 1 0 3 1
+refdes=AtoI0
+T 47800 55900 5 10 1 1 0 3 1
+footprint=SEMPAC_12x12_100A.fp
 }

diff --git a/sch-pcb/devboard/atoi-2.sch b/sch-pcb/devboard/atoi-2.sch
index 3ad8cc00614c8dfffccfcbe6dceed1539bbdeb26..6e9a6070d7a9030709c08b1c38f4fd1648284b57 100644 (file)
--- a/sch-pcb/devboard/atoi-2.sch
+++ b/sch-pcb/devboard/atoi-2.sch
@@ -16,11 +16,6 @@ pagenum=2
 T 52100 40300 5 10 1 1 0 6 1
 pageof=??
 }
-C 50100 43000 1 0 0 wb430-2.sym
-{
-T 52100 46300 5 10 1 1 0 3 1
-refdes=AtoI0
-}
 N 48900 46900 50100 46900 4
 {
 T 49500 46900 5 10 1 1 0 0 1
@@ -480,7 +475,7 @@ C 52300 48400 1 0 1 generic-power.sym
 T 52100 48650 5 10 1 1 0 3 1
 net=AVdd_atoi
 }
-N 42400 42800 48100 42800 4
+N 42400 42800 47800 42800 4
 N 42400 42800 42400 45700 4
 N 41300 46100 40400 46100 4
 {
@@ -722,3 +717,8 @@ C 46400 46000 1 0 0 pad-r-2.sym
 T 46600 46200 5 10 1 1 0 0 1
 refdes=TP203
 }
+C 50100 43000 1 0 0 wb430-2.sym
+{
+T 52100 46300 5 10 1 1 0 3 1
+refdes=AtoI0
+}

diff --git a/sch-pcb/devboard/atoi-3.sch b/sch-pcb/devboard/atoi-3.sch
index 4d305259f77a7ffe6b57c52d13cb8aee5f443247..f909615a959c104efbb9e2359de3788e34c01edb 100644 (file)
--- a/sch-pcb/devboard/atoi-3.sch
+++ b/sch-pcb/devboard/atoi-3.sch
@@ -16,11 +16,6 @@ pagenum=3
 T 52100 40300 5 10 1 1 0 6 1
 pageof=??
 }
-C 46300 45200 1 0 0 wb430-3.sym
-{
-T 48300 47700 5 10 1 1 0 3 1
-refdes=AtoI0
-}
 C 41800 46600 1 0 0 flag.sym
 N 44400 46700 41900 46700 4
 {
@@ -179,3 +174,8 @@ T 53100 49100 5 8 0 0 270 0 1
 value=jumper
 }
 N 50900 49100 50200 49100 4
+C 46300 45200 1 0 0 wb430-3.sym
+{
+T 48300 47700 5 10 1 1 0 3 1
+refdes=AtoI0
+}

diff --git a/sch-pcb/devboard/atoi-4.sch b/sch-pcb/devboard/atoi-4.sch
index 5fbffd0ea8ed9dd3c35bfdad6077a06d8e42bfba..4f1f8a14f6ba50391c4b4f0a4f1c083e2ffaa666 100644 (file)
--- a/sch-pcb/devboard/atoi-4.sch
+++ b/sch-pcb/devboard/atoi-4.sch
@@ -16,8 +16,55 @@ pagenum=4
 T 52100 40300 5 10 1 1 0 6 1
 pageof=??
 }
-C 47400 42500 1 0 0 wb430-4.sym
+C 46000 50500 1 0 0 nc-left-1.sym
 {
-T 48400 48600 5 10 1 1 0 3 1
+T 46000 50900 5 10 0 0 0 0 1
+value=NoConnection
+T 46000 51300 5 10 0 0 0 0 1
+device=DRC_Directive
+}
+N 46500 50600 46700 50600 4
+N 46700 50200 46300 50200 4
+N 46300 50200 46300 43200 4
+N 46700 43800 46300 43800 4
+N 46700 44200 46300 44200 4
+N 46700 44600 46300 44600 4
+N 46700 45000 46300 45000 4
+N 46700 45400 46300 45400 4
+N 46700 45800 46300 45800 4
+N 46700 46200 46300 46200 4
+N 46700 46600 46300 46600 4
+N 46700 47000 46300 47000 4
+N 46700 47400 46300 47400 4
+N 46700 47800 46300 47800 4
+N 46700 48200 46300 48200 4
+N 46700 48600 46300 48600 4
+N 46700 49000 46300 49000 4
+N 46700 49400 46300 49400 4
+N 46700 49800 46300 49800 4
+N 48700 50600 49100 50600 4
+N 49100 50600 49100 46600 4
+N 48700 47000 49100 47000 4
+N 48700 47400 49100 47400 4
+N 48700 47800 49100 47800 4
+N 48700 48200 49100 48200 4
+N 48700 48600 49100 48600 4
+N 48700 49000 49100 49000 4
+N 48700 49400 49100 49400 4
+N 48700 49800 49100 49800 4
+N 48700 50200 49100 50200 4
+C 46200 42900 1 0 0 gnd-1.sym
+{
+T 46100 42750 5 10 1 1 0 0 1
+net=AVSS:1
+}
+C 49000 46300 1 0 0 gnd-1.sym
+{
+T 48900 46150 5 10 1 1 0 0 1
+net=AVSS:1
+}
+C 46700 43100 1 0 0 wb430-4.sym
+{
+T 47700 49200 5 10 1 1 0 3 1
 refdes=AtoI0
 }

diff --git a/sch-pcb/devboard/atoi-5.sch b/sch-pcb/devboard/atoi-5.sch
new file mode 100644 (file)
index 0000000..0227e15
--- /dev/null
+++ b/sch-pcb/devboard/atoi-5.sch
@@ -0,0 +1,23 @@
+v 20111231 2
+C 40000 40000 0 0 0 title-wa-85x110.sym
+{
+T 49900 40600 5 10 1 1 0 0 1
+date=---
+T 53700 40600 5 10 1 1 0 0 1
+rev=---
+T 53700 40300 5 10 1 1 0 0 1
+auth=DJW
+T 49900 40900 5 8 1 1 0 0 1
+fname=$Id: $
+T 49900 41300 5 14 1 1 0 0 1
+title=Power Domains
+T 50600 40300 5 10 1 1 0 6 1
+pagenum=5
+T 52100 40300 5 10 1 1 0 6 1
+pageof=??
+}
+C 45400 44800 1 0 0 wb430-5.sym
+{
+T 47100 46900 5 10 1 1 0 3 1
+refdes=AtoI0
+}

diff --git a/sch-pcb/sym/wb430-1.djboxsym b/sch-pcb/sym/wb430-1.djboxsym
index ec08425d4af0e97a918445bf007884c7cdb14207..9bacab53fb0a251b4c2a0055965bf14255d23f52 100644 (file)
--- a/sch-pcb/sym/wb430-1.djboxsym
+++ b/sch-pcb/sym/wb430-1.djboxsym
@@ -3,13 +3,12 @@
 #   ns430 and atoi_digital
 #
 
---vmode
 
 [labels]
 AtoI
 NS430
 AtoI digi
-1of4
+1of5
 refdes=AtoI0
 footprint=SEMPAC_12x12_100A.fp
 
@@ -57,27 +56,4 @@ footprint=SEMPAC_12x12_100A.fp
 98     !       \_RESET\_
 
 
-
-[top]
-93             DVDD
-22             DVDD
-30             DVDD
-20             VDD
-32             VDD
-91             VDD
-
-89             VDD_digi
-
-
-[bottom]
-92             DVSS
-23             DVSS
-29             DVSS
-21             VSS
-31             VSS
-90             VSS
-
-88             VSS_digi
-
-
 # vim:softtabstop=0 noexpandtab ft=sh

diff --git a/sch-pcb/sym/wb430-1.sym b/sch-pcb/sym/wb430-1.sym
index 682b6bff89b7802353b23036fee863ff19f31aac..5fcbca001cd939ae4cb1c399cf752240e2cb066a 100644 (file)
--- a/sch-pcb/sym/wb430-1.sym
+++ b/sch-pcb/sym/wb430-1.sym
@@ -1,511 +1,357 @@
 v 20060123 1
-B 300 300 4800 12200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-T 2700 11000 9 10 1 1 0 3 1
+B 300 300 4800 10800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 2700 10500 9 10 1 1 0 3 1
 AtoI
-T 2700 10600 9 10 1 1 0 3 1
+T 2700 10100 9 10 1 1 0 3 1
 NS430
-T 2700 10200 9 10 1 1 0 3 1
+T 2700 9700 9 10 1 1 0 3 1
 AtoI digi
-T 2700 9800 9 10 1 1 0 3 1
-1of4
-T 2700 9400 9 10 1 1 0 3 1
+T 2700 9300 9 10 1 1 0 3 1
+1of5
+T 2700 8900 9 10 1 1 0 3 1
 refdes=AtoI0
-T 2700 9000 9 10 1 1 0 3 1
+T 2700 8500 9 10 1 1 0 3 1
 footprint=SEMPAC_12x12_100A.fp
-P 5400 11200 5100 11200 1 0 0
+P 5400 10700 5100 10700 1 0 0
 {
-T 5050 11200 9 10 1 1 0 7 1
+T 5050 10700 9 10 1 1 0 7 1
 pinlabel=DOUT0_mux
-T 5200 11250 5 8 1 1 0 0 1
+T 5200 10750 5 8 1 1 0 0 1
 pinnumber=1
-T 5200 11250 5 8 0 1 0 0 1
+T 5200 10750 5 8 0 1 0 0 1
 pinseq=1
-T 5000 11250 9 10 0 1 0 6 1
+T 5000 10750 9 10 0 1 0 6 1
 pintype=pas
 }
-P 5400 10800 5100 10800 1 0 0
+P 5400 10300 5100 10300 1 0 0
 {
-T 5050 10800 9 10 1 1 0 7 1
+T 5050 10300 9 10 1 1 0 7 1
 pinlabel=DOUT0_conf
-T 5200 10850 5 8 1 1 0 0 1
+T 5200 10350 5 8 1 1 0 0 1
 pinnumber=2
-T 5200 10850 5 8 0 1 0 0 1
+T 5200 10350 5 8 0 1 0 0 1
 pinseq=2
-T 5000 10850 9 10 0 1 0 6 1
+T 5000 10350 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 10400 300 10400 1 0 0
+P 0 9900 300 9900 1 0 0
 {
-T 350 10400 9 10 1 1 0 1 1
+T 350 9900 9 10 1 1 0 1 1
 pinlabel=PA15/CS0_conf
-T 200 10450 5 8 1 1 0 6 1
+T 200 9950 5 8 1 1 0 6 1
 pinnumber=3
-T 200 10450 5 8 0 1 0 6 1
+T 200 9950 5 8 0 1 0 6 1
 pinseq=3
-T 200 10450 9 10 0 1 0 6 1
+T 200 9950 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 10000 300 10000 1 0 0
+P 0 9500 300 9500 1 0 0
 {
-T 350 10000 9 10 1 1 0 1 1
+T 350 9500 9 10 1 1 0 1 1
 pinlabel=PA14/RXD1
-T 200 10050 5 8 1 1 0 6 1
+T 200 9550 5 8 1 1 0 6 1
 pinnumber=4
-T 200 10050 5 8 0 1 0 6 1
+T 200 9550 5 8 0 1 0 6 1
 pinseq=4
-T 200 10050 9 10 0 1 0 6 1
+T 200 9550 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 9600 300 9600 1 0 0
+P 0 9100 300 9100 1 0 0
 {
-T 350 9600 9 10 1 1 0 1 1
+T 350 9100 9 10 1 1 0 1 1
 pinlabel=PA13/TXD1
-T 200 9650 5 8 1 1 0 6 1
+T 200 9150 5 8 1 1 0 6 1
 pinnumber=5
-T 200 9650 5 8 0 1 0 6 1
+T 200 9150 5 8 0 1 0 6 1
 pinseq=5
-T 200 9650 9 10 0 1 0 6 1
+T 200 9150 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 9200 300 9200 1 0 0
+P 0 8700 300 8700 1 0 0
 {
-T 350 9200 9 10 1 1 0 1 1
+T 350 8700 9 10 1 1 0 1 1
 pinlabel=PA12/SCLK1
-T 200 9250 5 8 1 1 0 6 1
+T 200 8750 5 8 1 1 0 6 1
 pinnumber=6
-T 200 9250 5 8 0 1 0 6 1
+T 200 8750 5 8 0 1 0 6 1
 pinseq=6
-T 200 9250 9 10 0 1 0 6 1
+T 200 8750 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 8800 300 8800 1 0 0
+P 0 8300 300 8300 1 0 0
 {
-T 350 8800 9 10 1 1 0 1 1
+T 350 8300 9 10 1 1 0 1 1
 pinlabel=PA11/MOSI1
-T 200 8850 5 8 1 1 0 6 1
+T 200 8350 5 8 1 1 0 6 1
 pinnumber=7
-T 200 8850 5 8 0 1 0 6 1
+T 200 8350 5 8 0 1 0 6 1
 pinseq=7
-T 200 8850 9 10 0 1 0 6 1
+T 200 8350 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 8400 300 8400 1 0 0
+P 0 7900 300 7900 1 0 0
 {
-T 350 8400 9 10 1 1 0 1 1
+T 350 7900 9 10 1 1 0 1 1
 pinlabel=PA10/MISO1
-T 200 8450 5 8 1 1 0 6 1
+T 200 7950 5 8 1 1 0 6 1
 pinnumber=8
-T 200 8450 5 8 0 1 0 6 1
+T 200 7950 5 8 0 1 0 6 1
 pinseq=8
-T 200 8450 9 10 0 1 0 6 1
+T 200 7950 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 8000 300 8000 1 0 0
+P 0 7500 300 7500 1 0 0
 {
-T 350 8000 9 10 1 1 0 1 1
+T 350 7500 9 10 1 1 0 1 1
 pinlabel=PA9/SCL/swap
-T 200 8050 5 8 1 1 0 6 1
+T 200 7550 5 8 1 1 0 6 1
 pinnumber=9
-T 200 8050 5 8 0 1 0 6 1
+T 200 7550 5 8 0 1 0 6 1
 pinseq=9
-T 200 8050 9 10 0 1 0 6 1
+T 200 7550 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 7600 300 7600 1 0 0
+P 0 7100 300 7100 1 0 0
 {
-T 350 7600 9 10 1 1 0 1 1
+T 350 7100 9 10 1 1 0 1 1
 pinlabel=PA8/SDA
-T 200 7650 5 8 1 1 0 6 1
+T 200 7150 5 8 1 1 0 6 1
 pinnumber=10
-T 200 7650 5 8 0 1 0 6 1
+T 200 7150 5 8 0 1 0 6 1
 pinseq=10
-T 200 7650 9 10 0 1 0 6 1
+T 200 7150 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 7200 300 7200 1 0 0
+P 0 6700 300 6700 1 0 0
 {
-T 350 7200 9 10 1 1 0 1 1
+T 350 6700 9 10 1 1 0 1 1
 pinlabel=PA7/CS0_mux/BSL
-T 200 7250 5 8 1 1 0 6 1
+T 200 6750 5 8 1 1 0 6 1
 pinnumber=11
-T 200 7250 5 8 0 1 0 6 1
+T 200 6750 5 8 0 1 0 6 1
 pinseq=11
-T 200 7250 9 10 0 1 0 6 1
+T 200 6750 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 6800 300 6800 1 0 0
+P 0 6300 300 6300 1 0 0
 {
-T 350 6800 9 10 1 1 0 1 1
+T 350 6300 9 10 1 1 0 1 1
 pinlabel=PA6/IRQ
-T 200 6850 5 8 1 1 0 6 1
+T 200 6350 5 8 1 1 0 6 1
 pinnumber=12
-T 200 6850 5 8 0 1 0 6 1
+T 200 6350 5 8 0 1 0 6 1
 pinseq=12
-T 200 6850 9 10 0 1 0 6 1
+T 200 6350 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 6400 300 6400 1 0 0
+P 0 5900 300 5900 1 0 0
 {
-T 350 6400 9 10 1 1 0 1 1
+T 350 5900 9 10 1 1 0 1 1
 pinlabel=PA5/RDX0
-T 200 6450 5 8 1 1 0 6 1
+T 200 5950 5 8 1 1 0 6 1
 pinnumber=13
-T 200 6450 5 8 0 1 0 6 1
+T 200 5950 5 8 0 1 0 6 1
 pinseq=13
-T 200 6450 9 10 0 1 0 6 1
+T 200 5950 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 6000 300 6000 1 0 0
+P 0 5500 300 5500 1 0 0
 {
-T 350 6000 9 10 1 1 0 1 1
+T 350 5500 9 10 1 1 0 1 1
 pinlabel=PA4/TXD0
-T 200 6050 5 8 1 1 0 6 1
+T 200 5550 5 8 1 1 0 6 1
 pinnumber=14
-T 200 6050 5 8 0 1 0 6 1
+T 200 5550 5 8 0 1 0 6 1
 pinseq=14
-T 200 6050 9 10 0 1 0 6 1
+T 200 5550 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 5600 300 5600 1 0 0
+P 0 5100 300 5100 1 0 0
 {
-T 350 5600 9 10 1 1 0 1 1
+T 350 5100 9 10 1 1 0 1 1
 pinlabel=PA3/SCLK0
-T 200 5650 5 8 1 1 0 6 1
+T 200 5150 5 8 1 1 0 6 1
 pinnumber=15
-T 200 5650 5 8 0 1 0 6 1
+T 200 5150 5 8 0 1 0 6 1
 pinseq=15
-T 200 5650 9 10 0 1 0 6 1
+T 200 5150 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 5200 300 5200 1 0 0
+P 0 4700 300 4700 1 0 0
 {
-T 350 5200 9 10 1 1 0 1 1
+T 350 4700 9 10 1 1 0 1 1
 pinlabel=PA2/MOSI0
-T 200 5250 5 8 1 1 0 6 1
+T 200 4750 5 8 1 1 0 6 1
 pinnumber=16
-T 200 5250 5 8 0 1 0 6 1
+T 200 4750 5 8 0 1 0 6 1
 pinseq=16
-T 200 5250 9 10 0 1 0 6 1
+T 200 4750 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 4800 300 4800 1 0 0
+P 0 4300 300 4300 1 0 0
 {
-T 350 4800 9 10 1 1 0 1 1
+T 350 4300 9 10 1 1 0 1 1
 pinlabel=PA1/MISO0
-T 200 4850 5 8 1 1 0 6 1
+T 200 4350 5 8 1 1 0 6 1
 pinnumber=17
-T 200 4850 5 8 0 1 0 6 1
+T 200 4350 5 8 0 1 0 6 1
 pinseq=17
-T 200 4850 9 10 0 1 0 6 1
+T 200 4350 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 4400 300 4400 1 0 0
+P 0 3900 300 3900 1 0 0
 {
-T 350 4400 9 10 1 1 0 1 1
+T 350 3900 9 10 1 1 0 1 1
 pinlabel=PA0/CS_flash
-T 200 4450 5 8 1 1 0 6 1
+T 200 3950 5 8 1 1 0 6 1
 pinnumber=18
-T 200 4450 5 8 0 1 0 6 1
+T 200 3950 5 8 0 1 0 6 1
 pinseq=18
-T 200 4450 9 10 0 1 0 6 1
+T 200 3950 9 10 0 1 0 6 1
 pintype=pas
 }
-V 250 3600 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 0 3600 200 3600 1 0 0
+V 250 3100 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 0 3100 200 3100 1 0 0
 {
-T 350 3600 9 10 1 1 0 1 1
+T 350 3100 9 10 1 1 0 1 1
 pinlabel=\_RST\_
-T 200 3650 5 8 1 1 0 6 1
+T 200 3150 5 8 1 1 0 6 1
 pinnumber=19
-T 200 3650 5 8 0 1 0 6 1
+T 200 3150 5 8 0 1 0 6 1
 pinseq=19
-T 200 3650 9 10 0 1 0 6 1
+T 200 3150 9 10 0 1 0 6 1
 pintype=pas
 }
-P 2700 12800 2700 12500 1 0 0
+P 0 2300 300 2300 1 0 0
 {
-T 2700 12450 9 10 1 1 90 7 1
-pinlabel=VDD
-T 2750 12550 5 8 1 1 0 0 1
-pinnumber=20
-T 2750 12550 5 8 0 1 0 0 1
-pinseq=20
-T 2600 50 9 10 0 1 0 6 1
-pintype=pas
-}
-P 2700 0 2700 300 1 0 0
-{
-T 2700 350 9 10 1 1 90 1 1
-pinlabel=VSS
-T 2750 250 5 8 1 1 0 2 1
-pinnumber=21
-T 2750 250 5 8 0 1 0 2 1
-pinseq=21
-T 2600 950 9 10 0 1 0 6 1
-pintype=pas
-}
-P 1900 12800 1900 12500 1 0 0
-{
-T 1900 12450 9 10 1 1 90 7 1
-pinlabel=DVDD
-T 1950 12550 5 8 1 1 0 0 1
-pinnumber=22
-T 1950 12550 5 8 0 1 0 0 1
-pinseq=22
-T 1800 50 9 10 0 1 0 6 1
-pintype=pas
-}
-P 1900 0 1900 300 1 0 0
-{
-T 1900 350 9 10 1 1 90 1 1
-pinlabel=DVSS
-T 1950 250 5 8 1 1 0 2 1
-pinnumber=23
-T 1950 250 5 8 0 1 0 2 1
-pinseq=23
-T 1800 950 9 10 0 1 0 6 1
-pintype=pas
-}
-P 0 2800 300 2800 1 0 0
-{
-T 350 2800 9 10 1 1 0 1 1
+T 350 2300 9 10 1 1 0 1 1
 pinlabel=LFXTALI
-T 200 2850 5 8 1 1 0 6 1
+T 200 2350 5 8 1 1 0 6 1
 pinnumber=24
-T 200 2850 5 8 0 1 0 6 1
+T 200 2350 5 8 0 1 0 6 1
 pinseq=24
-T 200 2850 9 10 0 1 0 6 1
+T 200 2350 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 2400 300 2400 1 0 0
+P 0 1900 300 1900 1 0 0
 {
-T 350 2400 9 10 1 1 0 1 1
+T 350 1900 9 10 1 1 0 1 1
 pinlabel=LFXTALO
-T 200 2450 5 8 1 1 0 6 1
+T 200 1950 5 8 1 1 0 6 1
 pinnumber=25
-T 200 2450 5 8 0 1 0 6 1
+T 200 1950 5 8 0 1 0 6 1
 pinseq=25
-T 200 2450 9 10 0 1 0 6 1
+T 200 1950 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 2000 300 2000 1 0 0
+P 0 1500 300 1500 1 0 0
 {
-T 350 2000 9 10 1 1 0 1 1
+T 350 1500 9 10 1 1 0 1 1
 pinlabel=NC
-T 200 2050 5 8 1 1 0 6 1
+T 200 1550 5 8 1 1 0 6 1
 pinnumber=26
-T 200 2050 5 8 0 1 0 6 1
+T 200 1550 5 8 0 1 0 6 1
 pinseq=26
-T 200 2050 9 10 0 1 0 6 1
+T 200 1550 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 1600 300 1600 1 0 0
+P 0 1100 300 1100 1 0 0
 {
-T 350 1600 9 10 1 1 0 1 1
+T 350 1100 9 10 1 1 0 1 1
 pinlabel=HFXTALI
-T 200 1650 5 8 1 1 0 6 1
+T 200 1150 5 8 1 1 0 6 1
 pinnumber=27
-T 200 1650 5 8 0 1 0 6 1
+T 200 1150 5 8 0 1 0 6 1
 pinseq=27
-T 200 1650 9 10 0 1 0 6 1
+T 200 1150 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 1200 300 1200 1 0 0
+P 0 700 300 700 1 0 0
 {
-T 350 1200 9 10 1 1 0 1 1
+T 350 700 9 10 1 1 0 1 1
 pinlabel=HFXTALO
-T 200 1250 5 8 1 1 0 6 1
+T 200 750 5 8 1 1 0 6 1
 pinnumber=28
-T 200 1250 5 8 0 1 0 6 1
+T 200 750 5 8 0 1 0 6 1
 pinseq=28
-T 200 1250 9 10 0 1 0 6 1
-pintype=pas
-}
-P 2300 0 2300 300 1 0 0
-{
-T 2300 350 9 10 1 1 90 1 1
-pinlabel=DVSS
-T 2350 250 5 8 1 1 0 2 1
-pinnumber=29
-T 2350 250 5 8 0 1 0 2 1
-pinseq=29
-T 2200 950 9 10 0 1 0 6 1
-pintype=pas
-}
-P 2300 12800 2300 12500 1 0 0
-{
-T 2300 12450 9 10 1 1 90 7 1
-pinlabel=DVDD
-T 2350 12550 5 8 1 1 0 0 1
-pinnumber=30
-T 2350 12550 5 8 0 1 0 0 1
-pinseq=30
-T 2200 50 9 10 0 1 0 6 1
-pintype=pas
-}
-P 3100 0 3100 300 1 0 0
-{
-T 3100 350 9 10 1 1 90 1 1
-pinlabel=VSS
-T 3150 250 5 8 1 1 0 2 1
-pinnumber=31
-T 3150 250 5 8 0 1 0 2 1
-pinseq=31
-T 3000 950 9 10 0 1 0 6 1
-pintype=pas
-}
-P 3100 12800 3100 12500 1 0 0
-{
-T 3100 12450 9 10 1 1 90 7 1
-pinlabel=VDD
-T 3150 12550 5 8 1 1 0 0 1
-pinnumber=32
-T 3150 12550 5 8 0 1 0 0 1
-pinseq=32
-T 3000 50 9 10 0 1 0 6 1
-pintype=pas
-}
-P 3900 0 3900 300 1 0 0
-{
-T 3900 350 9 10 1 1 90 1 1
-pinlabel=VSS_digi
-T 3950 250 5 8 1 1 0 2 1
-pinnumber=88
-T 3950 250 5 8 0 1 0 2 1
-pinseq=88
-T 3800 950 9 10 0 1 0 6 1
-pintype=pas
-}
-P 3900 12800 3900 12500 1 0 0
-{
-T 3900 12450 9 10 1 1 90 7 1
-pinlabel=VDD_digi
-T 3950 12550 5 8 1 1 0 0 1
-pinnumber=89
-T 3950 12550 5 8 0 1 0 0 1
-pinseq=89
-T 3800 50 9 10 0 1 0 6 1
-pintype=pas
-}
-P 3500 0 3500 300 1 0 0
-{
-T 3500 350 9 10 1 1 90 1 1
-pinlabel=VSS
-T 3550 250 5 8 1 1 0 2 1
-pinnumber=90
-T 3550 250 5 8 0 1 0 2 1
-pinseq=90
-T 3400 950 9 10 0 1 0 6 1
-pintype=pas
-}
-P 3500 12800 3500 12500 1 0 0
-{
-T 3500 12450 9 10 1 1 90 7 1
-pinlabel=VDD
-T 3550 12550 5 8 1 1 0 0 1
-pinnumber=91
-T 3550 12550 5 8 0 1 0 0 1
-pinseq=91
-T 3400 50 9 10 0 1 0 6 1
-pintype=pas
-}
-P 1500 0 1500 300 1 0 0
-{
-T 1500 350 9 10 1 1 90 1 1
-pinlabel=DVSS
-T 1550 250 5 8 1 1 0 2 1
-pinnumber=92
-T 1550 250 5 8 0 1 0 2 1
-pinseq=92
-T 1400 950 9 10 0 1 0 6 1
-pintype=pas
-}
-P 1500 12800 1500 12500 1 0 0
-{
-T 1500 12450 9 10 1 1 90 7 1
-pinlabel=DVDD
-T 1550 12550 5 8 1 1 0 0 1
-pinnumber=93
-T 1550 12550 5 8 0 1 0 0 1
-pinseq=93
-T 1400 50 9 10 0 1 0 6 1
+T 200 750 9 10 0 1 0 6 1
 pintype=pas
 }
-P 5400 8400 5100 8400 1 0 0
+P 5400 7900 5100 7900 1 0 0
 {
-T 5050 8400 9 10 1 1 0 7 1
+T 5050 7900 9 10 1 1 0 7 1
 pinlabel=CS1_mux
-T 5200 8450 5 8 1 1 0 0 1
+T 5200 7950 5 8 1 1 0 0 1
 pinnumber=94
-T 5200 8450 5 8 0 1 0 0 1
+T 5200 7950 5 8 0 1 0 0 1
 pinseq=94
-T 5000 8450 9 10 0 1 0 6 1
+T 5000 7950 9 10 0 1 0 6 1
 pintype=pas
 }
-P 5400 8800 5100 8800 1 0 0
+P 5400 8300 5100 8300 1 0 0
 {
-T 5050 8800 9 10 1 1 0 7 1
+T 5050 8300 9 10 1 1 0 7 1
 pinlabel=CS1_conf
-T 5200 8850 5 8 1 1 0 0 1
+T 5200 8350 5 8 1 1 0 0 1
 pinnumber=95
-T 5200 8850 5 8 0 1 0 0 1
+T 5200 8350 5 8 0 1 0 0 1
 pinseq=95
-T 5000 8850 9 10 0 1 0 6 1
+T 5000 8350 9 10 0 1 0 6 1
 pintype=pas
 }
-P 5400 9200 5100 9200 1 0 0
+P 5400 8700 5100 8700 1 0 0
 {
-T 5050 9200 9 10 1 1 0 7 1
+T 5050 8700 9 10 1 1 0 7 1
 pinlabel=MULT1
-T 5200 9250 5 8 1 1 0 0 1
+T 5200 8750 5 8 1 1 0 0 1
 pinnumber=96
-T 5200 9250 5 8 0 1 0 0 1
+T 5200 8750 5 8 0 1 0 0 1
 pinseq=96
-T 5000 9250 9 10 0 1 0 6 1
+T 5000 8750 9 10 0 1 0 6 1
 pintype=pas
 }
-P 5400 9600 5100 9600 1 0 0
+P 5400 9100 5100 9100 1 0 0
 {
-T 5050 9600 9 10 1 1 0 7 1
+T 5050 9100 9 10 1 1 0 7 1
 pinlabel=MULT0
-T 5200 9650 5 8 1 1 0 0 1
+T 5200 9150 5 8 1 1 0 0 1
 pinnumber=97
-T 5200 9650 5 8 0 1 0 0 1
+T 5200 9150 5 8 0 1 0 0 1
 pinseq=97
-T 5000 9650 9 10 0 1 0 6 1
+T 5000 9150 9 10 0 1 0 6 1
 pintype=pas
 }
-V 5150 7600 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 5400 7600 5200 7600 1 0 0
+V 5150 7100 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 5400 7100 5200 7100 1 0 0
 {
-T 5050 7600 9 10 1 1 0 7 1
+T 5050 7100 9 10 1 1 0 7 1
 pinlabel=\_RESET\_
-T 5200 7650 5 8 1 1 0 0 1
+T 5200 7150 5 8 1 1 0 0 1
 pinnumber=98
-T 5200 7650 5 8 0 1 0 0 1
+T 5200 7150 5 8 0 1 0 0 1
 pinseq=98
-T 5000 7650 9 10 0 1 0 6 1
+T 5000 7150 9 10 0 1 0 6 1
 pintype=pas
 }
-P 5400 10000 5100 10000 1 0 0
+P 5400 9500 5100 9500 1 0 0
 {
-T 5050 10000 9 10 1 1 0 7 1
+T 5050 9500 9 10 1 1 0 7 1
 pinlabel=NCO_CLK
-T 5200 10050 5 8 1 1 0 0 1
+T 5200 9550 5 8 1 1 0 0 1
 pinnumber=99
-T 5200 10050 5 8 0 1 0 0 1
+T 5200 9550 5 8 0 1 0 0 1
 pinseq=99
-T 5000 10050 9 10 0 1 0 6 1
+T 5000 9550 9 10 0 1 0 6 1
 pintype=pas
 }
-P 0 11200 300 11200 1 0 0
+P 0 10700 300 10700 1 0 0
 {
-T 350 11200 9 10 1 1 0 1 1
+T 350 10700 9 10 1 1 0 1 1
 pinlabel=INT_SPI
-T 200 11250 5 8 1 1 0 6 1
+T 200 10750 5 8 1 1 0 6 1
 pinnumber=100
-T 200 11250 5 8 0 1 0 6 1
+T 200 10750 5 8 0 1 0 6 1
 pinseq=100
-T 200 11250 9 10 0 1 0 6 1
+T 200 10750 9 10 0 1 0 6 1
 pintype=pas
 }

diff --git a/sch-pcb/sym/wb430-2.djboxsym b/sch-pcb/sym/wb430-2.djboxsym
index 00209a78a8eb24685f465c90a22b1b78ceb9e65c..d5951a97340996e65b8eeec5d88ba3e25772337c 100644 (file)
--- a/sch-pcb/sym/wb430-2.djboxsym
+++ b/sch-pcb/sym/wb430-2.djboxsym
@@ -5,7 +5,7 @@
 [labels]
 AtoI
 Analog
-2of4
+2of5
 refdes=AtoI0
 
 

diff --git a/sch-pcb/sym/wb430-2.sym b/sch-pcb/sym/wb430-2.sym
index 9b0848d572d115a4c09a32fee7b7e7367eb7eaf9..854ee2f950f4e5644bc0c1464b9194ec0a344106 100644 (file)
--- a/sch-pcb/sym/wb430-2.sym
+++ b/sch-pcb/sym/wb430-2.sym
@@ -5,7 +5,7 @@ AtoI
 T 2000 4100 9 10 1 1 0 3 1
 Analog
 T 2000 3700 9 10 1 1 0 3 1
-2of4
+2of5
 T 2000 3300 9 10 1 1 0 3 1
 refdes=AtoI0
 P 4000 1900 3700 1900 1 0 0

diff --git a/sch-pcb/sym/wb430-3.djboxsym b/sch-pcb/sym/wb430-3.djboxsym
index c211fd9af5f538d314e23b92010cc9974016efae..db8d5ce1bcbd2a2039d303c4f9d7837c9ae63018 100644 (file)
--- a/sch-pcb/sym/wb430-3.djboxsym
+++ b/sch-pcb/sym/wb430-3.djboxsym
@@ -5,7 +5,7 @@
 [labels]
 AtoI
 OTA
-3of4
+3of5
 refdes=AtoI0
 
 

diff --git a/sch-pcb/sym/wb430-3.sym b/sch-pcb/sym/wb430-3.sym
index d9a8b0683751722a90b5673922ccb4ef1ca49549..81312c6eb7c5895c15df6106a9ec123295c7b822 100644 (file)
--- a/sch-pcb/sym/wb430-3.sym
+++ b/sch-pcb/sym/wb430-3.sym
@@ -5,7 +5,7 @@ AtoI
 T 2000 3300 9 10 1 1 0 3 1
 OTA
 T 2000 2900 9 10 1 1 0 3 1
-3of4
+3of5
 T 2000 2500 9 10 1 1 0 3 1
 refdes=AtoI0
 P 3900 3900 3600 3900 1 0 0

diff --git a/sch-pcb/sym/wb430-4.djboxsym b/sch-pcb/sym/wb430-4.djboxsym
index 95072d5caac31667940cdbaec6ffd270e0d45733..55a361e05b3dd6adfeb1f55994d8dbee6df3dbd7 100644 (file)
--- a/sch-pcb/sym/wb430-4.djboxsym
+++ b/sch-pcb/sym/wb430-4.djboxsym
@@ -5,7 +5,7 @@
 [labels]
 AtoI
 mb
-4of4
+4of5
 refdes=AtoI0
 
 

diff --git a/sch-pcb/sym/wb430-4.sym b/sch-pcb/sym/wb430-4.sym
index 3d9b7e6c8d1e350c8dff007b407ad0a7b3af1821..925ba23e0a7b8d4bd6cadd297ee65f3e54940f5e 100644 (file)
--- a/sch-pcb/sym/wb430-4.sym
+++ b/sch-pcb/sym/wb430-4.sym
@@ -5,7 +5,7 @@ AtoI
 T 1000 6900 9 10 1 1 0 3 1
 mb
 T 1000 6500 9 10 1 1 0 3 1
-4of4
+4of5
 T 1000 6100 9 10 1 1 0 3 1
 refdes=AtoI0
 P 0 7500 300 7500 1 0 0

diff --git a/sch-pcb/sym/wb430-5.djboxsym b/sch-pcb/sym/wb430-5.djboxsym
new file mode 100644 (file)
index 0000000..daa5588
--- /dev/null
+++ b/sch-pcb/sym/wb430-5.djboxsym
@@ -0,0 +1,36 @@
+#
+# WB430 digital
+#   ns430 and atoi_digital
+#
+
+
+[labels]
+AtoI
+Digital power
+5of5
+refdes=AtoI0
+
+
+[left]
+93             DVDD
+22             DVDD
+30             DVDD
+20             VDD
+32             VDD
+91             VDD
+
+89             VDD_digi
+
+
+[right]
+92             DVSS
+23             DVSS
+29             DVSS
+21             VSS
+31             VSS
+90             VSS
+
+88             VSS_digi
+
+
+# vim:softtabstop=0 noexpandtab ft=sh

diff --git a/sch-pcb/sym/wb430-5.sym b/sch-pcb/sym/wb430-5.sym
new file mode 100644 (file)
index 0000000..2f73f55
--- /dev/null
+++ b/sch-pcb/sym/wb430-5.sym
@@ -0,0 +1,164 @@
+v 20060123 1
+B 300 300 2800 3600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 1700 3300 9 10 1 1 0 3 1
+AtoI
+T 1700 2900 9 10 1 1 0 3 1
+Digital power
+T 1700 2500 9 10 1 1 0 3 1
+5of5
+T 1700 2100 9 10 1 1 0 3 1
+refdes=AtoI0
+P 0 2300 300 2300 1 0 0
+{
+T 350 2300 9 10 1 1 0 1 1
+pinlabel=VDD
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