;de-select flash /CS
304a: 92 d3 08 1a bis #1, &PAOUT ;r3 As==01
-;fill RAM with 0xaaaa's
+;check RAM for errors
+;writes error count to 0x263e
+;address is not present in fabbed mmap
+; FIXME: verify r9 is not modified in bootcode
+; (to read count later in early user code)
304e: 09 43 clr r9
3050: 35 40 aa aa mov #-21846,r5 ;#0xaaaa
3054: 37 40 00 40 mov #16384, r7 ;#RAMStart
30a0: 82 49 3e 26 mov r9, &0x263e
;check state of PA(7)
+; PA.7 low -> invoke bootstrap loader
+; PA.7 high -> copy code from flash
30a4: b2 b0 80 00 bit #128, &PADSR ;#0x0080
30a8: 00 1a
- 30aa: 4e 24 jz $+158 ;abs 0x3148
- 30ac: 82 43 04 00 mov #0, &CRCINIRES_L ;r3 As==00
+ 30aa: 4e 24 jz $+158 ;#gotoMain ;abs 0x3148
+
+CopyFromFlash:
+;setup CRC
+ 30ac: 82 43 04 00 mov #0, &CRCINIRES ;r3 As==00
+;no effect, port B is NC
30b0: 82 43 0a 1a mov #0, &PBOUT ;r3 As==00
30b4: b2 40 00 80 mov #-32768,&PBOEN ;#0x8000
30b8: 06 1a
+;check state of PA.9 (aka I2C SCL)
+;r13 holds the flag
+; PA.9 low -> do not byteswap
+; PA.9 high -> byteswap words from flash
30ba: 0d 43 clr r13
30bc: b2 b0 00 02 bit #512, &PADSR ;#0x0200
30c0: 00 1a
30c2: 01 24 jz $+4 ;abs 0x30c6
30c4: 1d 43 mov #1, r13 ;r3 As==01
+;no effect, port B is NC
30c6: 82 43 06 1a mov #0, &PBOEN ;r3 As==00
+;r7 holds start of RAM address
+;r8 (end of RAM)+1
30ca: 37 40 00 40 mov #16384, r7 ;#RAMStart
30ce: 88 01 00 00 mova #0x10000,r8
+;select flash /CS line
30d2: 92 c3 08 1a bic #1, &PAOUT ;r3 As==01
+;flash command 0x03 - read data bytes
+; 00 - address MSB
+; r7 - address low word (=RAMStart)
30d6: b2 40 00 03 mov #768, &SPI0_TDR ;#0x0300
30da: 04 20
30dc: 82 47 04 20 mov r7, &SPI0_TDR
+;wait for transmissions to finish
30e0: 92 b3 06 20 bit #1, &SPI0_SR ;r3 As==01
30e4: fd 27 jz $-4 ;abs 0x30e0
+;send 0x0000 to flash
30e6: 82 43 04 20 mov #0, &SPI0_TDR ;r3 As==00
30ea: 92 b3 06 20 bit #1, &SPI0_SR ;r3 As==01
30ee: fd 27 jz $-4 ;abs 0x30ea
+;send second 0x0000 to flash
30f0: 82 43 04 20 mov #0, &SPI0_TDR ;r3 As==00
+;clear status register (any r/w does so)
30f4: 82 43 06 20 mov #0, &SPI0_SR ;r3 As==00
+
+MainLoop1:
+;wait for return word
30f8: a2 b2 06 20 bit #4, &SPI0_SR ;r2 As==10
30fc: fd 27 jz $-4 ;abs 0x30f8
+;store received word
30fe: 15 42 02 20 mov &SPI0_RDR,r5
+;send another 0x0000 to SPI
3102: 82 43 04 20 mov #0, &SPI0_TDR ;r3 As==00
+;?swap bytes?
3106: 0d 93 tst r13
- 3108: 01 24 jz $+4 ;abs 0x310c
+ 3108: 01 24 jz $+4 ;#SPINoSwap ;abs 0x310c
310a: 85 10 swpb r5
+SPINoSwap:
+;copy received word to RAM address in r7 (ini=RAMStart)
310c: 87 45 00 00 mov r5, 0(r7) ;CRCDI_L(r7)
- 3110: b2 47 00 00 mov @r7+, &CRCDI_L
+;compute CRC of data
+;increment r7
+ 3110: b2 47 00 00 mov @r7+, &CRCDI
+;?reached end of RAM?
3114: d8 07 cmpa r7, r8
- 3116: f0 23 jnz $-30 ;abs 0x30f8
+ 3116: f0 23 jnz $-30 ;#MainLoop1 ;abs 0x30f8
+
+;wait for last transmission to finish
3118: a2 b3 06 20 bit #2, &SPI0_SR ;r3 As==10
311c: fd 27 jz $-4 ;abs 0x3118
+;deselect flash /CS line
311e: 92 d3 08 1a bis #1, &PAOUT ;r3 As==01
+
+;enable SPI0
+; set CPOL,CPHA = 1,1
+; 8-bit transfers
3122: b2 40 70 00 mov #112, &SPI0_CR ;#0x0070
3126: 00 20
+;select flash /CS line
3128: 92 c3 08 1a bic #1, &PAOUT ;r3 As==01
+;flash command: deep power down
312c: b2 40 00 b9 mov #-18176,&SPI0_TDR ;#0xb900
3130: 04 20
+;wait for completion
+;deselect flash /CS line
3132: a2 b3 06 20 bit #2, &SPI0_SR ;r3 As==10
3136: fd 27 jz $-4 ;abs 0x3132
3138: 92 d3 08 1a bis #1, &PAOUT ;r3 As==01
+
+;disable PA peripherals
313c: 82 43 0c 1a mov #0, &PAPER ;r3 As==00
+;disable PA output drivers
3140: 82 43 04 1a mov #0, &PAOEN ;r3 As==00
+;execute user code starting at address pointed to by 0xfffe
3144: 10 42 fe ff br &0xfffe
+
+;-----------------------------------------------------------------------
+; Bootloader through UART0
+gotoMain:
+;disable PB output drivers (none fabbed)
3148: 82 43 06 1a mov #0, &PBOEN ;r3 As==00
+;r14 is state of PA.8
314c: 0e 93 tst r14
314e: 04 20 jnz $+10 ;abs 0x3158
+; PA.8 = 0
+; orig intention: set CG_SR = 0x2004
+; effect here: GPIN0 = 0x2004 (writes have no effect)
3150: b0 40 04 20 mov #8196, 0xf2ac ;#SPI0_TDR, PC rel. 0x02402
3154: ac f2
3156: 03 3c jmp $+8 ;abs 0x315e
+; PA.8 = 1
+; orig intention: set CG_SR = 0x2008
+; effect here: GPIN0 = 0x2008 (writes have no effect)
3158: b0 40 08 20 mov #8200, 0xf2a4 ;#SPI1_CR, PC rel. 0x02402
315c: a4 f2
+;set SCG1 = 1
315e: 32 d0 80 00 bis #128,sr ;#0x0080
- Assembly_Code:
- gotoMain:
+Assembly_Code:
3162: b2 40 8e 34 mov #UART_ISR, &0xffea ;#0x348e
3166: ea ff
3168: b2 40 da 33 mov #TMR0_INT, &0xfff0 ;#0x33da
projects / 430.git / commitdiff