check in to match final blog post draft

git-svn-id: https://svn.code.sf.net/p/freetel/code@2546 01035d8c-6547-0410-b346-abe4f91aad63

diff --git a/misc/capmult/capmult.m b/misc/capmult/capmult.m
index 024f2d03882799404f6101524d5af08df2017fc4..20927d907642b3fd56be48741553be39c73cf618 100644 (file)
--- a/misc/capmult/capmult.m
+++ b/misc/capmult/capmult.m
@@ -22,9 +22,19 @@ Vo1 = Vi*j*Xc/(Rs+j*Xc);
 
 Vo2 = Vi*j*Xc/(Rb+j*Xc);
 
-printf("standard: %3.0f mVrms   Cap Mult: %3.0f mVrms\n", abs(Vo1)*1E3, abs(Vo2)*1E3);
+printf("1/ standard: %3.0f mVrms   Cap Mult: %3.0f mVrms\n", abs(Vo1)*1E3, abs(Vo2)*1E3);
 
+# 2nd simulation between two Rb values with C=47uF
 
+C = 47E-6;
+Xc = 1/(w*C);
+
+Rb=50;
+Vo3 = Vi*j*Xc/(Rb+j*Xc);
+Rb=5000;
+Vo4 = Vi*j*Xc/(Rb+j*Xc);
+
+printf("2/ Cap Mult C=47uF Rb=50: %3.0f mVrms   Rb=5000: %3.1f mVrms\n", abs(Vo3)*1E3, abs(Vo4)*1E3);
 
 
 

diff --git a/misc/capmult/capmult_rb.asc b/misc/capmult/capmult_rb.asc
new file mode 100644 (file)
index 0000000..36eb301
--- /dev/null
+++ b/misc/capmult/capmult_rb.asc
@@ -0,0 +1,112 @@
+Version 4
+SHEET 1 880 680
+WIRE 128 -224 48 -224
+WIRE 320 -224 208 -224
+WIRE 448 -224 320 -224
+WIRE 48 -208 48 -224
+WIRE 320 -176 320 -224
+WIRE 448 -128 448 -224
+WIRE 320 -80 320 -96
+WIRE 384 -80 320 -80
+WIRE 320 -64 320 -80
+WIRE 496 -32 448 -32
+WIRE 576 -32 560 -32
+WIRE 448 0 448 -32
+WIRE 576 0 576 -32
+WIRE 48 80 48 -128
+WIRE 320 80 320 0
+WIRE 320 80 48 80
+WIRE 448 80 320 80
+WIRE 576 80 448 80
+WIRE 48 96 48 80
+WIRE 128 128 48 128
+WIRE 320 128 208 128
+WIRE 464 128 320 128
+WIRE 48 160 48 128
+WIRE 320 160 320 128
+WIRE 464 208 464 128
+WIRE 320 256 320 240
+WIRE 400 256 320 256
+WIRE 464 336 464 304
+WIRE 528 336 528 304
+WIRE 48 416 48 240
+WIRE 320 416 320 320
+WIRE 320 416 48 416
+WIRE 464 416 320 416
+WIRE 528 416 464 416
+WIRE 48 432 48 416
+FLAG 48 96 0
+FLAG 48 432 0
+SYMBOL voltage 48 144 R0
+WINDOW 123 0 0 Left 2
+WINDOW 39 0 0 Left 2
+SYMATTR InstName V1
+SYMATTR Value SINE(12 0.1 100)
+SYMBOL res 224 112 R90
+WINDOW 0 0 56 VBottom 2
+WINDOW 3 32 56 VTop 2
+SYMATTR InstName R1
+SYMATTR Value 1
+SYMBOL res 336 256 R180
+WINDOW 0 36 76 Left 2
+WINDOW 3 36 40 Left 2
+SYMATTR InstName R2
+SYMATTR Value 5E3
+SYMBOL res 480 432 R180
+WINDOW 0 36 76 Left 2
+WINDOW 3 36 40 Left 2
+SYMATTR InstName R3
+SYMATTR Value 100
+SYMBOL cap 304 256 R0
+SYMATTR InstName C1
+SYMATTR Value 47E-6
+SYMBOL npn 400 208 R0
+WINDOW 0 73 4 Left 2
+WINDOW 3 73 34 Left 2
+SYMATTR InstName Q1
+SYMATTR Value 2N3904
+SYMBOL voltage 48 -224 R0
+WINDOW 123 0 0 Left 2
+WINDOW 39 0 0 Left 2
+SYMATTR InstName V2
+SYMATTR Value SINE(12 0.1 100)
+SYMBOL res 224 -240 R90
+WINDOW 0 0 56 VBottom 2
+WINDOW 3 32 56 VTop 2
+SYMATTR InstName R4
+SYMATTR Value 1
+SYMBOL res 464 96 R180
+WINDOW 0 36 76 Left 2
+WINDOW 3 36 40 Left 2
+SYMATTR InstName R5
+SYMATTR Value 100
+SYMBOL cap 304 -64 R0
+SYMATTR InstName C2
+SYMATTR Value 47E-6
+SYMBOL cap 560 -48 R90
+WINDOW 0 0 32 VBottom 2
+WINDOW 3 32 32 VTop 2
+SYMATTR InstName C3
+SYMATTR Value 1E-6
+SYMBOL cap 528 288 R90
+WINDOW 0 0 32 VBottom 2
+WINDOW 3 32 32 VTop 2
+SYMATTR InstName C4
+SYMATTR Value 1E-6
+SYMBOL res 560 -16 R0
+SYMATTR InstName R6
+SYMATTR Value 1E6
+SYMBOL res 512 320 R0
+SYMATTR InstName R7
+SYMATTR Value 1E6
+SYMBOL npn 384 -128 R0
+WINDOW 0 73 4 Left 2
+WINDOW 3 74 28 Left 2
+SYMATTR InstName Q2
+SYMATTR Value 2N3904
+SYMBOL res 336 -80 R180
+WINDOW 0 36 76 Left 2
+WINDOW 3 36 40 Left 2
+SYMATTR InstName R8
+SYMATTR Value 50
+TEXT 0 464 Left 2 !.tran 0 1 0