dual channel ADC driver working

git-svn-id: https://svn.code.sf.net/p/freetel/code@1817 01035d8c-6547-0410-b346-abe4f91aad63

diff --git a/codec2-dev/stm32/Makefile b/codec2-dev/stm32/Makefile
index 707c177b81dd5f120b84fc47e79f42c518862a20..21cf46ba5678c713c2d65d02747829a3922ae4cd 100644 (file)
--- a/codec2-dev/stm32/Makefile
+++ b/codec2-dev/stm32/Makefile
@@ -109,7 +109,7 @@ OBJS = $(SRCS:.c=.o)
 
 ###################################################
 
-all: libstm32f4.a codec2_profile.elf fft_test.elf dac_ut.elf dac_play.elf adc_rec.elf pwm_ut.elf fdmdv_profile.elf sm1000_leds_switches_ut.elf sm1000.elf adcdac_ut.elf freedv_tx_profile.elf freedv_rx_profile.elf 
+all: libstm32f4.a codec2_profile.elf fft_test.elf dac_ut.elf dac_play.elf adc_rec.elf pwm_ut.elf fdmdv_profile.elf sm1000_leds_switches_ut.elf sm1000.elf adcdac_ut.elf freedv_tx_profile.elf freedv_rx_profile.elf adc_sd.elf
 
 dl/$(PERIPHLIBZIP):
        mkdir -p dl
@@ -193,6 +193,20 @@ src/init.c
 adc_rec.elf: $(ADC_REC_SRCS)
        $(CC) $(CFLAGS) $^ -o $@ $(LIBPATHS) $(LIBS)
 
+ADC_SD_SRCS=\
+src/adc_sd.c \
+../src/fifo.c \
+gdb_stdio.c \
+src/stm32f4_adc.c \
+src/stm32f4_dac.c \
+src/debugblinky.c \
+src/system_stm32f4xx.c \
+src/startup_stm32f4xx.s \
+src/init.c
+
+adc_sd.elf: $(ADC_SD_SRCS)
+       $(CC) $(CFLAGS) $^ -o $@ $(LIBPATHS) $(LIBS)
+
 PWM_UT_SRCS=\
 gdb_stdio.c \
 src/stm32f4_pwm.c \

diff --git a/codec2-dev/stm32/src/adc_rec.c b/codec2-dev/stm32/src/adc_rec.c
index f1a17cbf24d09faade35d866f66c187e4c38df0c..dd59b11be7b999891dd51ca9c3560c4d11b669cd 100644 (file)
--- a/codec2-dev/stm32/src/adc_rec.c
+++ b/codec2-dev/stm32/src/adc_rec.c
@@ -4,7 +4,18 @@
   AUTHOR......: David Rowe\r
   DATE CREATED: 30 May 2014\r
 \r
-  Records a 16 kHz sample rate raw file from the STM32F4 ADC Pin PA1.\r
+  Records a 16 kHz sample rate raw file from one of the ADC channels.\r
+  Note the semi-hosting system isn't fast enough to transfer 2 16 kHz\r
+  streams at once.\r
+  \r
+  ~/stlink$ sudo ./st-util -f ~/codec2-dev/stm32/adc_rec.elf\r
+  ~/codec2-dev/stm32$ ~/gcc-arm-none-eabi-4_7-2013q1/bin/arm-none-eabi-gdb adc_rec.elf\r
+  \r
+  (when finished) \r
+  $ play -r 16000 -s -2 ~/stlink/adc.raw\r
+\r
+  adc1 -> "from radio"  \r
+  adc2 -> "mic amp"\r
 \r
 \*---------------------------------------------------------------------------*/\r
 \r
@@ -28,31 +39,36 @@
 #include <stdlib.h>\r
 #include "stm32f4_adc.h"\r
 #include "gdb_stdio.h"\r
+#include "stm32f4xx_gpio.h"\r
 \r
 #define REC_TIME_SECS 10\r
 #define  N  (ADC_BUF_SZ*6)\r
 #define FS  16000\r
 \r
+extern int adc_overflow1;\r
+extern int adc_overflow2;\r
+\r
 int main(void){\r
     short  buf[N];\r
-    FILE  *frec;\r
+    FILE  *fadc;\r
     int    i, bufs;\r
 \r
-    adc_open(2*N);\r
-\r
-    frec = fopen("stm_out.raw", "wb");\r
-    if (frec == NULL) {\r
-        printf("Error opening input file: stm_out.raw\n\nTerminating....\n");\r
+    fadc = fopen("adc.raw", "wb");\r
+    if (fadc == NULL) {\r
+        printf("Error opening input file: adc.raw\n\nTerminating....\n");\r
         exit(1);\r
     }\r
     bufs = FS*REC_TIME_SECS/N;\r
 \r
     printf("Starting!\n");\r
+    adc_open(4*N);\r
+\r
     for(i=0; i<bufs; i++) {\r
-        while(adc1_read(buf, N) == -1);\r
-        fwrite(buf, sizeof(short), N, frec);  \r
-        printf(".\n");\r
+        while(adc2_read(buf, N) == -1);\r
+        fwrite(buf, sizeof(short), N, fadc);  \r
+        printf("adc_overflow1: %d  adc_overflow2: %d   \n", adc_overflow1, adc_overflow2);\r
     }\r
-    fclose(frec);\r
+    fclose(fadc);\r
+\r
     printf("Finished!\n");\r
 }\r

diff --git a/codec2-dev/stm32/src/sm1000_main.c b/codec2-dev/stm32/src/sm1000_main.c
index 28694ece3919613438363115669cf55dd88ce069..7639ce27a19a9b8fccf49a47d6959d180c049502 100644 (file)
--- a/codec2-dev/stm32/src/sm1000_main.c
+++ b/codec2-dev/stm32/src/sm1000_main.c
@@ -78,7 +78,6 @@ int main(void) {
     \r
     while(1) {\r
 \r
-\r
         if (0) {\r
 \r
             /* Transmit -------------------------------------------------------------------------*/\r

diff --git a/codec2-dev/stm32/src/stm32f4_adc.c b/codec2-dev/stm32/src/stm32f4_adc.c
index 73728ff693c487e0625a58d323b017b850c8587e..e310f2aa3f6c0efa4825c8ddae80aa03e62a535f 100644 (file)
--- a/codec2-dev/stm32/src/stm32f4_adc.c
+++ b/codec2-dev/stm32/src/stm32f4_adc.c
@@ -38,8 +38,9 @@
 #include "debugblinky.h"
 
 struct FIFO *adc1_fifo;
+struct FIFO *adc2_fifo;
 unsigned short adc_buf[ADC_BUF_SZ];
-int adc_overflow;
+int adc_overflow1, adc_overflow2;
 int half,full;
 
 #define ADCx_DR_ADDRESS          ((uint32_t)0x4001204C)
@@ -54,6 +55,8 @@ static void tim2_config(void);
 void adc_open(int fifo_sz) {
     adc1_fifo = fifo_create(fifo_sz);
     assert(adc1_fifo != NULL);
+    adc2_fifo = fifo_create(fifo_sz);
+    assert(adc2_fifo != NULL);
 
     tim2_config();
     adc_configure();
@@ -66,6 +69,12 @@ int adc1_read(short buf[], int n) {
     return fifo_read(adc1_fifo, buf, n);
 }
 
+/* n signed 16 bit samples in buf[] if return != -1 */
+
+int adc2_read(short buf[], int n) {   
+    return fifo_read(adc2_fifo, buf, n);
+}
+
 
 static void tim2_config(void)
 {
@@ -131,13 +140,14 @@ void adc_configure(){
     ADC_init_structure.ADC_ContinuousConvMode = DISABLE; 
     ADC_init_structure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T2_TRGO;
     ADC_init_structure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_Rising;
-    ADC_init_structure.ADC_NbrOfConversion = 1;
-    ADC_init_structure.ADC_ScanConvMode = DISABLE;
+    ADC_init_structure.ADC_NbrOfConversion = 2;
+    ADC_init_structure.ADC_ScanConvMode = ENABLE;
     ADC_Init(ADCx,&ADC_init_structure);
 
     // Select the channel to be read from
 
     ADC_RegularChannelConfig(ADCx,ADC_Channel_1,1,ADC_SampleTime_144Cycles);
+    ADC_RegularChannelConfig(ADCx,ADC_Channel_2,2,ADC_SampleTime_144Cycles);
     //ADC_VBATCmd(ENABLE); 
 
     /* DMA  configuration **************************************/
@@ -195,8 +205,9 @@ void adc_configure(){
 */
 
 void DMA2_Stream0_IRQHandler(void) {
-    int i, sam;
-    short signed_buf[ADC_BUF_SZ/2];
+    int i, j, sam;
+    short signed_buf1[ADC_BUF_SZ/2];
+    short signed_buf2[ADC_BUF_SZ/2];
 
     GPIOE->ODR = (1 << 0);
 
@@ -207,15 +218,19 @@ void DMA2_Stream0_IRQHandler(void) {
 
         /* convert to signed */
 
-        for(i=0; i<ADC_BUF_SZ/2; i++) {
+        for(i=0, j=0; i<ADC_BUF_SZ/2; i+=2,j++) {
             sam = (int)adc_buf[i] - 32768;
-            signed_buf[i] = sam;
+            signed_buf1[j] = sam;
+            sam = (int)adc_buf[i+1] - 32768;
+            signed_buf2[j] = sam;
         }
+        /* write first half to fifo */
 
-       /* write first half to fifo */
-
-        if (fifo_write(adc1_fifo, signed_buf, ADC_BUF_SZ/2) == -1) {
-            adc_overflow++;
+        if (fifo_write(adc1_fifo, signed_buf1, ADC_BUF_SZ/4) == -1) {
+            adc_overflow1++;
+        }
+        if (fifo_write(adc2_fifo, signed_buf2, ADC_BUF_SZ/4) == -1) {
+            adc_overflow2++;
         }
 
         /* Clear DMA Stream Transfer Complete interrupt pending bit */
@@ -230,15 +245,20 @@ void DMA2_Stream0_IRQHandler(void) {
 
         /* convert to signed */
 
-        for(i=0; i<ADC_BUF_SZ/2; i++) {
+        for(i=0, j=0; i<ADC_BUF_SZ/2; i+=2,j++) {
             sam = (int)adc_buf[ADC_BUF_SZ/2 + i] - 32768;
-            signed_buf[i] = sam;
+            signed_buf1[j] = sam;
+            sam = (int)adc_buf[ADC_BUF_SZ/2 + i+1] - 32768;
+            signed_buf2[j] = sam;
         }
 
         /* write second half to fifo */
 
-        if (fifo_write(adc1_fifo, signed_buf, ADC_BUF_SZ/2) == -1) {
-            adc_overflow++;
+        if (fifo_write(adc1_fifo, signed_buf1, ADC_BUF_SZ/4) == -1) {
+            adc_overflow1++;
+        }
+        if (fifo_write(adc2_fifo, signed_buf2, ADC_BUF_SZ/4) == -1) {
+            adc_overflow2++;
         }
 
         /* Clear DMA Stream Transfer Complete interrupt pending bit */