WIP

diff --git a/sch-pcb/devboard/atoi-1.sch b/sch-pcb/devboard/atoi-1.sch
index aceed1cd9332b9d49c9054d289da820bf5d13d20..6c897093fde4fd3e5c6e83852d33c5c0d65562fb 100644 (file)
--- a/sch-pcb/devboard/atoi-1.sch
+++ b/sch-pcb/devboard/atoi-1.sch
@@ -53,3 +53,225 @@ N 55800 50600 56800 50600 4
 T 55900 50600 5 10 1 1 0 0 1
 netname=ADC0_IN7
 }
+C 51200 55400 1 0 0 EMBEDDEDdac8568-1.sym
+[
+B 51500 55700 2300 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+V 51450 59300 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 51200 59300 51400 59300 1 0 0
+{
+T 51550 59300 9 10 1 1 0 1 1
+pinlabel=\_LDAC\_
+T 51400 59350 5 8 1 1 0 6 1
+pinnumber=1
+T 51400 59350 5 8 0 1 0 6 1
+pinseq=1
+T 51400 59350 9 10 0 1 0 6 1
+pintype=in
+}
+V 51450 58900 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 51200 58900 51400 58900 1 0 0
+{
+T 51550 58900 9 10 1 1 0 1 1
+pinlabel=\_SYNC\_
+T 51400 58950 5 8 1 1 0 6 1
+pinnumber=2
+T 51400 58950 5 8 0 1 0 6 1
+pinseq=2
+T 51400 58950 9 10 0 1 0 6 1
+pintype=in
+}
+P 52700 60500 52700 60200 1 0 0
+{
+T 52700 60150 9 10 1 1 90 7 1
+pinlabel=AVDD
+T 52750 60250 5 8 1 1 0 0 1
+pinnumber=3
+T 52750 60250 5 8 0 1 0 0 1
+pinseq=3
+T 52600 55450 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 51200 58100 51500 58100 1 0 0
+{
+T 51550 58100 9 10 1 1 0 1 1
+pinlabel=Vout0
+T 51400 58150 5 8 1 1 0 6 1
+pinnumber=4
+T 51400 58150 5 8 0 1 0 6 1
+pinseq=4
+T 51400 58150 9 10 0 1 0 6 1
+pintype=out
+}
+P 51200 57700 51500 57700 1 0 0
+{
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+pinseq=5
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+pintype=out
+}
+P 51200 57300 51500 57300 1 0 0
+{
+T 51550 57300 9 10 1 1 0 1 1
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+T 51400 57350 5 8 1 1 0 6 1
+pinnumber=6
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+pinseq=6
+T 51400 57350 9 10 0 1 0 6 1
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+}
+P 51200 56900 51500 56900 1 0 0
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+}
+P 51200 56100 51500 56100 1 0 0
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+T 51550 56100 9 10 1 1 0 1 1
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+}
+V 53850 56100 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 54100 56100 53900 56100 1 0 0
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+T 53750 56100 9 10 1 1 0 7 1
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+pinnumber=9
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+T 53700 56150 9 10 0 1 0 6 1
+pintype=in
+}
+P 54100 56900 53800 56900 1 0 0
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+T 53750 56900 9 10 1 1 0 7 1
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+pintype=out
+}
+P 54100 57300 53800 57300 1 0 0
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+T 53750 57300 9 10 1 1 0 7 1
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+}
+P 54100 57700 53800 57700 1 0 0
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+T 53750 57700 9 10 1 1 0 7 1
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+T 53700 57750 9 10 0 1 0 6 1
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+}
+P 54100 58100 53800 58100 1 0 0
+{
+T 53750 58100 9 10 1 1 0 7 1
+pinlabel=Vout1
+T 53900 58150 5 8 1 1 0 0 1
+pinnumber=13
+T 53900 58150 5 8 0 1 0 0 1
+pinseq=13
+T 53700 58150 9 10 0 1 0 6 1
+pintype=out
+}
+P 52700 55400 52700 55700 1 0 0
+{
+T 52700 55750 9 10 1 1 90 1 1
+pinlabel=GND
+T 52750 55650 5 8 1 1 0 2 1
+pinnumber=14
+T 52750 55650 5 8 0 1 0 2 1
+pinseq=14
+T 52600 55850 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 54100 58900 53800 58900 1 0 0
+{
+T 53750 58900 9 10 1 1 0 7 1
+pinlabel=DIN
+T 53900 58950 5 8 1 1 0 0 1
+pinnumber=15
+T 53900 58950 5 8 0 1 0 0 1
+pinseq=15
+T 53700 58950 9 10 0 1 0 6 1
+pintype=in
+}
+P 54100 59300 53800 59300 1 0 0
+{
+T 53750 59300 9 10 1 1 0 7 1
+pinlabel=SCLK
+T 53900 59350 5 8 1 1 0 0 1
+pinnumber=16
+T 53900 59350 5 8 0 1 0 0 1
+pinseq=16
+T 53700 59350 9 10 0 1 0 6 1
+pintype=in
+}
+T 53800 60300 9 10 0 0 0 0 1
+document=dac8586.pdf
+T 53800 60500 9 10 0 0 0 0 1
+footprint=TSSOP_16N__TI
+T 52700 59100 9 10 0 1 0 3 1
+refdes=U?
+T 52700 58700 9 10 1 1 0 3 1
+DAC8568
+]
+{
+T 53700 53400 5 10 0 0 0 0 1
+footprint=TSSOP_16N__TI
+T 52700 59100 5 10 1 1 0 3 1
+refdes=U200
+}
+N 51200 57700 50300 57700 4
+{
+T 50500 57700 5 10 1 1 0 0 1
+netname=INA
+}
+N 54100 57700 55100 57700 4
+{
+T 54500 57700 5 10 1 1 0 0 1
+netname=INB
+}
+C 52500 60500 1 0 0 generic-power.sym
+{
+T 52700 60750 5 10 1 1 0 3 1
+net=AVdd_dev:1
+}
+C 52600 55100 1 0 0 gnd-1.sym
+{
+T 52500 54950 5 10 1 1 0 0 1
+net=AVSS:1
+}
+N 51200 57300 50300 57300 4
+{
+T 50500 57300 5 10 1 1 0 0 1
+netname=CMI
+}

diff --git a/sch-pcb/devboard/atoi-2.sch b/sch-pcb/devboard/atoi-2.sch
index bf5282c108c0ceac309c847e7e170cfcb8305fac..3ad8cc00614c8dfffccfcbe6dceed1539bbdeb26 100644 (file)
--- a/sch-pcb/devboard/atoi-2.sch
+++ b/sch-pcb/devboard/atoi-2.sch
@@ -10,514 +10,715 @@ auth=DJW
 T 49900 40900 5 8 1 1 0 0 1
 fname=$Id: $
 T 49900 41300 5 14 1 1 0 0 1
-title=TITLE
+title=AtoI - Analog Chain[0:1]
 T 50600 40300 5 10 1 1 0 6 1
-pagenum=1
+pagenum=2
 T 52100 40300 5 10 1 1 0 6 1
-pageof=1
+pageof=??
 }
-C 51400 42800 1 0 0 wb430-2.sym
+C 50100 43000 1 0 0 wb430-2.sym
 {
-T 53400 46100 5 10 1 1 0 3 1
+T 52100 46300 5 10 1 1 0 3 1
 refdes=AtoI0
 }
-N 50300 46700 51400 46700 4
+N 48900 46900 50100 46900 4
 {
-T 50500 46700 5 10 1 1 0 0 1
+T 49500 46900 5 10 1 1 0 0 1
 netname=biasR
 }
-N 50300 44300 51400 44300 4
+N 40400 42400 48400 42400 4
 {
-T 50500 44300 5 10 1 1 0 0 1
+T 40600 42400 5 10 1 1 0 0 1
 netname=INA
 }
-N 50300 43900 51400 43900 4
+N 40400 42000 48700 42000 4
 {
-T 50500 43900 5 10 1 1 0 0 1
+T 40600 42000 5 10 1 1 0 0 1
 netname=INB
 }
-N 50300 43500 51400 43500 4
+N 40400 41600 49100 41600 4
 {
-T 50500 43500 5 10 1 1 0 0 1
+T 40600 41600 5 10 1 1 0 0 1
 netname=CMI
 }
-N 50300 45100 51400 45100 4
+N 54900 47700 56700 47700 4
 {
-T 50500 45100 5 10 1 1 0 0 1
-netname=buf_biasR
-}
-N 55400 47500 56500 47500 4
-{
-T 55600 47500 5 10 1 1 0 0 1
+T 55800 47700 5 10 1 1 0 0 1
 netname=ADC0_IN4
 }
-N 55400 47100 56500 47100 4
+N 54900 47300 56700 47300 4
 {
-T 55600 47100 5 10 1 1 0 0 1
+T 55800 47300 5 10 1 1 0 0 1
 netname=ADC0_IN5
 }
-N 55400 45100 56500 45100 4
+N 55100 46100 56700 46100 4
 {
-T 55600 45100 5 10 1 1 0 0 1
+T 55800 46100 5 10 1 1 0 0 1
 netname=ADC0_IN6
 }
-N 55400 44700 56500 44700 4
+N 55100 45300 56700 45300 4
 {
-T 55600 44700 5 10 1 1 0 0 1
+T 55800 45300 5 10 1 1 0 0 1
 netname=ADC0_IN7
 }
-C 48500 48700 1 0 0 resistor-3.sym
+C 44300 43000 1 0 0 ad5242-1.sym
 {
-T 45100 49500 5 10 0 0 0 0 1
-device=RESISTOR
-T 48800 49300 5 10 1 1 0 0 1
-refdes=R?
-T 48800 49000 5 10 1 1 0 0 1
+T 48200 42800 5 10 0 0 0 0 1
+footprint=QFN_24N__ADI
+T 45400 47100 5 10 1 1 0 3 1
+refdes=U205
+}
+N 46600 47300 46400 47300 4
+C 44000 44400 1 0 1 resistor-3.sym
+{
+T 43800 45000 5 10 1 1 0 6 1
+refdes=R210
+T 43700 44700 5 10 1 1 0 6 1
 value=1k
 }
-C 48500 48400 1 0 0 gnd-1.sym
+N 44300 45300 43900 45300 4
+N 43900 44400 44300 44400 4
+N 44300 44400 44300 44900 4
+C 46600 43200 1 0 0 gnd-1.sym
 {
-T 48400 48250 5 10 1 1 0 0 1
+T 46500 43050 5 10 1 1 0 0 1
 net=AVSS:1
 }
-C 44400 48300 1 0 1 resistor-3.sym
+N 46400 45300 46700 45300 4
+N 46700 43500 46700 45300 4
+N 46700 44900 46400 44900 4
+C 43900 45500 1 0 0 generic-power.sym
 {
-T 44100 48900 5 10 1 1 0 6 1
-refdes=R?
-T 44100 48600 5 10 1 1 0 6 1
-value=1k
+T 44100 45750 5 10 1 1 0 3 1
+net=AVdd_dev:1
+}
+N 44100 45500 44100 45300 4
+N 46400 44100 46700 44100 4
+N 46400 43700 46700 43700 4
+C 47300 48500 1 0 0 opamp-dual-1.sym
+{
+T 46400 49200 5 10 0 0 0 0 1
+device=DUAL_OPAMP
+T 46900 47800 5 10 0 1 0 0 1
+footprint=SOT23__Maxim
+T 46400 49400 5 10 0 0 0 0 1
+symversion=0.2
+T 46900 47600 5 10 0 0 0 0 1
+slot=2
+T 47400 49300 5 10 1 1 0 0 1
+refdes=U204
+T 48000 49200 5 10 1 0 0 0 1
+slot=2
+T 48000 48600 5 10 1 1 0 0 1
+value=MAX9912
+}
+C 47300 50600 1 0 0 opamp-dual-1.sym
+{
+T 49400 52300 5 10 0 0 0 0 1
+device=DUAL_OPAMP
+T 49900 50900 5 10 0 1 0 0 1
+footprint=SOT23__Maxim
+T 49400 52500 5 10 0 0 0 0 1
+symversion=0.2
+T 47400 51400 5 10 1 1 0 0 1
+refdes=U203
+T 48000 51300 5 10 1 0 0 0 1
+slot=1
+T 48000 50700 5 10 1 1 0 0 1
+value=MAX9912
 }
-C 44400 48000 1 0 1 gnd-1.sym
+N 48900 51000 48300 51000 4
+N 48600 51000 48600 52000 4
+N 47300 52000 47300 51200 4
+N 47300 49100 47300 50000 4
+N 48600 48900 48600 50000 4
+N 48900 48900 48300 48900 4
+C 48000 49300 1 0 1 generic-power.sym
 {
-T 44500 47850 5 10 1 1 0 6 1
+T 47800 49550 5 10 1 1 0 3 1
+net=AVdd_dev:1
+}
+C 47700 48200 1 0 0 gnd-1.sym
+{
+T 47800 48350 5 10 1 1 0 0 1
 net=AVSS:1
 }
-C 41600 41400 1 0 0 EMBEDDEDdac8568-1.sym
-[
-B 41900 41700 2300 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-V 41850 45300 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 41600 45300 41800 45300 1 0 0
-{
-T 41950 45300 9 10 1 1 0 1 1
-pinlabel=\_LDAC\_
-T 41800 45350 5 8 1 1 0 6 1
-pinnumber=1
-T 41800 45350 5 8 0 1 0 6 1
-pinseq=1
-T 41800 45350 9 10 0 1 0 6 1
-pintype=in
-}
-V 41850 44900 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 41600 44900 41800 44900 1 0 0
-{
-T 41950 44900 9 10 1 1 0 1 1
-pinlabel=\_SYNC\_
-T 41800 44950 5 8 1 1 0 6 1
-pinnumber=2
-T 41800 44950 5 8 0 1 0 6 1
-pinseq=2
-T 41800 44950 9 10 0 1 0 6 1
-pintype=in
-}
-P 43100 46500 43100 46200 1 0 0
-{
-T 43100 46150 9 10 1 1 90 7 1
-pinlabel=AVDD
-T 43150 46250 5 8 1 1 0 0 1
-pinnumber=3
-T 43150 46250 5 8 0 1 0 0 1
-pinseq=3
-T 43000 41450 9 10 0 1 0 6 1
-pintype=pwr
-}
-P 41600 44100 41900 44100 1 0 0
-{
-T 41950 44100 9 10 1 1 0 1 1
-pinlabel=Vout0
-T 41800 44150 5 8 1 1 0 6 1
-pinnumber=4
-T 41800 44150 5 8 0 1 0 6 1
-pinseq=4
-T 41800 44150 9 10 0 1 0 6 1
-pintype=out
-}
-P 41600 43700 41900 43700 1 0 0
-{
-T 41950 43700 9 10 1 1 0 1 1
-pinlabel=Vout2
-T 41800 43750 5 8 1 1 0 6 1
-pinnumber=5
-T 41800 43750 5 8 0 1 0 6 1
-pinseq=5
-T 41800 43750 9 10 0 1 0 6 1
-pintype=out
-}
-P 41600 43300 41900 43300 1 0 0
-{
-T 41950 43300 9 10 1 1 0 1 1
-pinlabel=Vout4
-T 41800 43350 5 8 1 1 0 6 1
-pinnumber=6
-T 41800 43350 5 8 0 1 0 6 1
-pinseq=6
-T 41800 43350 9 10 0 1 0 6 1
-pintype=out
-}
-P 41600 42900 41900 42900 1 0 0
-{
-T 41950 42900 9 10 1 1 0 1 1
-pinlabel=Vout6
-T 41800 42950 5 8 1 1 0 6 1
-pinnumber=7
-T 41800 42950 5 8 0 1 0 6 1
-pinseq=7
-T 41800 42950 9 10 0 1 0 6 1
-pintype=out
-}
-P 41600 42100 41900 42100 1 0 0
-{
-T 41950 42100 9 10 1 1 0 1 1
-pinlabel=Vref
-T 41800 42150 5 8 1 1 0 6 1
-pinnumber=8
-T 41800 42150 5 8 0 1 0 6 1
-pinseq=8
-T 41800 42150 9 10 0 1 0 6 1
-pintype=out
-}
-V 44250 42100 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 44500 42100 44300 42100 1 0 0
-{
-T 44150 42100 9 10 1 1 0 7 1
-pinlabel=\_CLR\_
-T 44300 42150 5 8 1 1 0 0 1
-pinnumber=9
-T 44300 42150 5 8 0 1 0 0 1
-pinseq=9
-T 44100 42150 9 10 0 1 0 6 1
-pintype=in
-}
-P 44500 42900 44200 42900 1 0 0
-{
-T 44150 42900 9 10 1 1 0 7 1
-pinlabel=Vout7
-T 44300 42950 5 8 1 1 0 0 1
-pinnumber=10
-T 44300 42950 5 8 0 1 0 0 1
-pinseq=10
-T 44100 42950 9 10 0 1 0 6 1
-pintype=out
-}
-P 44500 43300 44200 43300 1 0 0
-{
-T 44150 43300 9 10 1 1 0 7 1
-pinlabel=Vout5
-T 44300 43350 5 8 1 1 0 0 1
-pinnumber=11
-T 44300 43350 5 8 0 1 0 0 1
-pinseq=11
-T 44100 43350 9 10 0 1 0 6 1
-pintype=out
-}
-P 44500 43700 44200 43700 1 0 0
-{
-T 44150 43700 9 10 1 1 0 7 1
-pinlabel=Vout3
-T 44300 43750 5 8 1 1 0 0 1
-pinnumber=12
-T 44300 43750 5 8 0 1 0 0 1
-pinseq=12
-T 44100 43750 9 10 0 1 0 6 1
-pintype=out
-}
-P 44500 44100 44200 44100 1 0 0
-{
-T 44150 44100 9 10 1 1 0 7 1
-pinlabel=Vout1
-T 44300 44150 5 8 1 1 0 0 1
-pinnumber=13
-T 44300 44150 5 8 0 1 0 0 1
-pinseq=13
-T 44100 44150 9 10 0 1 0 6 1
-pintype=out
-}
-P 43100 41400 43100 41700 1 0 0
-{
-T 43100 41750 9 10 1 1 90 1 1
-pinlabel=GND
-T 43150 41650 5 8 1 1 0 2 1
-pinnumber=14
-T 43150 41650 5 8 0 1 0 2 1
-pinseq=14
-T 43000 41850 9 10 0 1 0 6 1
-pintype=pwr
-}
-P 44500 44900 44200 44900 1 0 0
-{
-T 44150 44900 9 10 1 1 0 7 1
-pinlabel=DIN
-T 44300 44950 5 8 1 1 0 0 1
-pinnumber=15
-T 44300 44950 5 8 0 1 0 0 1
-pinseq=15
-T 44100 44950 9 10 0 1 0 6 1
-pintype=in
-}
-P 44500 45300 44200 45300 1 0 0
-{
-T 44150 45300 9 10 1 1 0 7 1
-pinlabel=SCLK
-T 44300 45350 5 8 1 1 0 0 1
-pinnumber=16
-T 44300 45350 5 8 0 1 0 0 1
-pinseq=16
-T 44100 45350 9 10 0 1 0 6 1
-pintype=in
-}
-T 44200 46300 9 10 0 0 0 0 1
-document=dac8586.pdf
-T 44200 46500 9 10 0 0 0 0 1
-footprint=TSSOP_16N__TI
-T 43100 45100 9 10 0 1 0 3 1
-refdes=U?
-T 43100 44700 9 10 1 1 0 3 1
-DAC8568
-]
-{
-T 44100 39400 5 10 0 0 0 0 1
-footprint=TSSOP_16N__TI
-T 43100 45100 5 10 1 1 0 3 1
-refdes=U?
-}
-C 45500 46300 1 0 0 ad5242-1.sym
-{
-T 49400 46100 5 10 0 0 0 0 1
-footprint=QFN_24N__ADI
-T 46600 50400 5 10 1 1 0 3 1
-refdes=U?
+C 48000 51400 1 0 1 generic-power.sym
+{
+T 47800 51650 5 10 1 1 0 3 1
+net=AVdd_dev:1
+}
+C 47700 50300 1 0 0 gnd-1.sym
+{
+T 47800 50450 5 10 1 1 0 0 1
+net=AVSS:1
 }
-C 43700 48300 1 0 1 resistor-3.sym
+C 47500 51900 1 270 1 resistor-3.sym
 {
-T 43400 48900 5 10 1 1 0 6 1
-refdes=R?
-T 43400 48600 5 10 1 1 0 6 1
+T 48300 52100 5 10 1 1 0 6 1
+refdes=R205
+T 47800 52100 5 10 1 1 0 6 1
+value=18k
+}
+N 47500 52000 47100 52000 4
+N 48400 52000 48600 52000 4
+C 46200 51900 1 270 1 resistor-3.sym
+{
+T 47000 52100 5 10 1 1 0 6 1
+refdes=R204
+T 46500 52100 5 10 1 1 0 6 1
+value=2k
+}
+C 45900 51500 1 0 0 gnd-1.sym
+{
+T 46000 51650 5 10 1 1 0 0 1
+net=AVSS:1
+}
+N 46000 51800 46000 52000 4
+N 46000 52000 46200 52000 4
+C 47500 49900 1 270 1 resistor-3.sym
+{
+T 48300 50100 5 10 1 1 0 6 1
+refdes=R209
+T 47800 50100 5 10 1 1 0 6 1
+value=18k
+}
+N 47500 50000 47100 50000 4
+N 48400 50000 48600 50000 4
+C 46200 49900 1 270 1 resistor-3.sym
+{
+T 47000 50100 5 10 1 1 0 6 1
+refdes=R207
+T 46500 50100 5 10 1 1 0 6 1
+value=2k
+}
+C 45900 49500 1 0 0 gnd-1.sym
+{
+T 46000 49650 5 10 1 1 0 0 1
+net=AVSS:1
+}
+N 46000 49800 46000 50000 4
+N 46000 50000 46200 50000 4
+N 44000 46900 44300 46900 4
+C 42100 46000 1 0 0 resistor-1.sym
+{
+T 42400 46400 5 10 0 0 0 0 1
+device=RESISTOR
+T 42300 46200 5 10 1 1 0 0 1
+refdes=R206
+T 42700 46200 5 10 1 1 0 0 1
 value=1k
 }
-C 49200 48700 1 0 0 resistor-3.sym
+C 43300 45000 1 0 1 resistor-3.sym
 {
-T 49500 49300 5 10 1 1 0 0 1
-refdes=R?
-T 49500 49000 5 10 1 1 0 0 1
+T 43000 45600 5 10 1 1 0 6 1
+refdes=R208
+T 43000 45300 5 10 1 1 0 6 1
 value=1k
 }
-N 44300 49800 45500 49800 4
+N 43000 46100 44300 46100 4
 {
-T 45000 49800 5 10 1 1 0 0 1
-netname=biasR
+T 43400 46100 5 10 1 1 0 0 1
+netname=biasR_mon
 }
-N 47600 50200 49200 50200 4
+N 43200 46100 43200 45900 4
+N 44300 46500 44100 46500 4
+N 44100 46500 44100 48000 4
+C 43300 44700 1 0 1 gnd-1.sym
 {
-T 47700 50200 5 10 1 1 0 0 1
-netname=buf_biasR
+T 43200 44850 5 10 1 1 0 6 1
+net=AVSS:1
 }
-C 47800 50400 1 0 0 pad-r.sym
+C 47000 45400 1 0 0 resistor-3.sym
 {
-T 48100 50800 5 10 1 1 0 0 1
-refdes=TP?
+T 47200 46000 5 10 1 1 0 0 1
+refdes=R211
+T 47200 45700 5 10 1 1 0 0 1
+value=1k
 }
-C 44100 50000 1 0 0 pad-l.sym
+N 47100 46300 47100 46500 4
+C 47000 45100 1 0 0 gnd-1.sym
 {
-T 44600 50400 5 10 1 1 0 0 1
-refdes=TP?
+T 47100 45250 5 10 1 1 0 0 1
+net=AVSS:1
 }
-N 45300 50200 45500 50200 4
-N 47800 50600 47600 50600 4
-N 48600 49600 48600 49800 4
-N 44300 49200 44300 49400 4
-N 41600 43700 40700 43700 4
+N 46400 46500 48000 46500 4
 {
-T 40900 43700 5 10 1 1 0 0 1
-netname=INA
+T 46500 46600 5 10 1 1 0 0 1
+netname=buf_biasR_mon
 }
-N 44500 43700 45500 43700 4
+N 48700 45300 50100 45300 4
 {
-T 44900 43700 5 10 1 1 0 0 1
-netname=INB
+T 49200 45300 5 10 1 1 0 0 1
+netname=buf_biasR
 }
-C 43000 49200 1 0 1 opamp-dual-1.sym
+C 42100 48500 1 0 0 opamp-dual-1.sym
 {
-T 43900 49900 5 10 0 0 0 6 1
+T 41200 49200 5 10 0 0 0 0 1
 device=DUAL_OPAMP
-T 43400 48500 5 10 0 1 0 6 1
+T 41700 47800 5 10 0 1 0 0 1
 footprint=SOT23__Maxim
-T 43900 50100 5 10 0 0 0 6 1
+T 41200 49400 5 10 0 0 0 0 1
 symversion=0.2
-T 43400 48300 5 10 0 0 0 6 1
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 slot=2
-T 42900 50000 5 10 1 1 0 6 1
-refdes=U?
-T 42300 49900 5 10 1 0 0 6 1
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 slot=2
-T 42300 49300 5 10 1 1 0 6 1
+T 42800 48600 5 10 1 1 0 0 1
 value=MAX9912
 }
-C 43700 51000 1 0 1 opamp-dual-1.sym
+C 42100 50600 1 0 0 opamp-dual-1.sym
 {
-T 41600 52700 5 10 0 0 0 6 1
+T 44200 52300 5 10 0 0 0 0 1
 device=DUAL_OPAMP
-T 41100 51300 5 10 0 1 0 6 1
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 footprint=SOT23__Maxim
-T 41600 52900 5 10 0 0 0 6 1
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 symversion=0.2
-T 43600 51800 5 10 1 1 0 6 1
-refdes=U?
-T 43000 51700 5 10 1 0 0 6 1
+T 42200 51400 5 10 1 1 0 0 1
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 slot=1
-T 43000 51100 5 10 1 1 0 6 1
+T 42800 50700 5 10 1 1 0 0 1
 value=MAX9912
 }
-N 41300 51400 42700 51400 4
+N 43700 51000 43100 51000 4
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+N 43700 48900 43100 48900 4
+C 42800 49300 1 0 1 generic-power.sym
 {
-T 41400 51500 5 10 1 1 0 0 1
-netname=ADC0_IN0
+T 42600 49550 5 10 1 1 0 3 1
+net=AVdd_dev:1
 }
-N 42400 51400 42400 52200 4
-N 42400 52200 43700 52200 4
-N 43700 52200 43700 51600 4
-N 43000 49800 43000 50400 4
-N 41700 50400 43000 50400 4
-N 41700 49600 41700 50400 4
-N 40700 49600 42000 49600 4
+C 42500 48200 1 0 0 gnd-1.sym
 {
-T 40800 49700 5 10 1 1 0 0 1
-netname=ADC0_IN1
+T 42600 48350 5 10 1 1 0 0 1
+net=AVSS:1
 }
-N 43000 49400 45500 49400 4
-N 43600 49400 43600 49200 4
-N 47600 49800 49900 49800 4
-N 49300 49600 49300 49800 4
-C 49900 49600 1 0 0 opamp-dual-1.sym
+C 42800 51400 1 0 1 generic-power.sym
 {
-T 50000 50400 5 10 1 1 0 0 1
-refdes=U?
-T 50600 50300 5 10 1 0 0 0 1
-slot=2
-T 50600 49700 5 10 1 1 0 0 1
-value=MAX9912
+T 42600 51650 5 10 1 1 0 3 1
+net=AVdd_dev:1
 }
-C 49700 51300 1 0 0 opamp-dual-1.sym
+C 42500 50300 1 0 0 gnd-1.sym
 {
-T 49800 52100 5 10 1 1 0 0 1
-refdes=U?
-T 50400 52000 5 10 1 0 0 0 1
-slot=1
-T 50400 51400 5 10 1 1 0 0 1
-value=MAX9912
+T 42600 50450 5 10 1 1 0 0 1
+net=AVSS:1
 }
-N 50700 51700 52100 51700 4
+C 42300 51900 1 270 1 resistor-3.sym
 {
-T 51200 51800 5 10 1 1 0 0 1
-netname=ADC0_IN2
+T 43100 52100 5 10 1 1 0 6 1
+refdes=R201
+T 42600 52100 5 10 1 1 0 6 1
+value=18k
 }
-N 51000 51700 51000 52500 4
-N 51000 52500 49700 52500 4
-N 49700 52500 49700 51900 4
-N 49900 50200 49900 50800 4
-N 51200 50800 49900 50800 4
-N 51200 50000 51200 50800 4
-N 50900 50000 52300 50000 4
+N 42300 52000 41900 52000 4
+N 43200 52000 43400 52000 4
+C 41000 51900 1 270 1 resistor-3.sym
 {
-T 51400 50100 5 10 1 1 0 0 1
-netname=ADC0_IN3
+T 41800 52100 5 10 1 1 0 6 1
+refdes=R200
+T 41300 52100 5 10 1 1 0 6 1
+value=2k
 }
-C 45200 47700 1 0 1 resistor-3.sym
+C 40700 51500 1 0 0 gnd-1.sym
 {
-T 44900 48300 5 10 1 1 0 6 1
-refdes=R?
-T 44900 48000 5 10 1 1 0 6 1
-value=1k
+T 40800 51650 5 10 1 1 0 0 1
+net=AVSS:1
 }
-N 45500 48600 45100 48600 4
-N 45100 47700 45500 47700 4
-N 45500 47700 45500 48200 4
-C 47800 46500 1 0 0 gnd-1.sym
+N 40800 51800 40800 52000 4
+N 40800 52000 41000 52000 4
+C 42300 49900 1 270 1 resistor-3.sym
 {
-T 47700 46350 5 10 1 1 0 0 1
+T 43100 50100 5 10 1 1 0 6 1
+refdes=R203
+T 42600 50100 5 10 1 1 0 6 1
+value=18k
+}
+N 42300 50000 41900 50000 4
+N 43200 50000 43400 50000 4
+C 41000 49900 1 270 1 resistor-3.sym
+{
+T 41800 50100 5 10 1 1 0 6 1
+refdes=R202
+T 41300 50100 5 10 1 1 0 6 1
+value=2k
+}
+C 40700 49500 1 0 0 gnd-1.sym
+{
+T 40800 49650 5 10 1 1 0 0 1
 net=AVSS:1
 }
-N 47600 48600 47900 48600 4
-N 47900 46800 47900 48600 4
-N 47900 48200 47600 48200 4
-C 45100 48800 1 0 0 generic-power.sym
+N 40800 49800 40800 50000 4
+N 40800 50000 41000 50000 4
+N 42100 50800 40800 50800 4
 {
-T 45300 49050 5 10 1 1 0 3 1
-net=VddPA:1
+T 40900 50800 5 10 1 1 0 0 1
+netname=biasR
 }
-N 45300 48800 45300 48600 4
-N 47600 47400 47900 47400 4
-N 47600 47000 47900 47000 4
-C 42900 46500 1 0 0 generic-power.sym
+N 42100 48700 40800 48700 4
 {
-T 43100 46750 5 10 1 1 0 3 1
-net=VddPA:1
+T 40900 48700 5 10 1 1 0 0 1
+netname=biasR_mon
 }
-C 43000 41100 1 0 0 gnd-1.sym
+N 47300 50800 46000 50800 4
 {
-T 42900 40950 5 10 1 1 0 0 1
-net=AVSS:1
+T 46100 50800 5 10 1 1 0 0 1
+netname=buf_biasR
+}
+N 47300 48700 46000 48700 4
+{
+T 46100 48700 5 10 1 1 0 0 1
+netname=buf_biasR_mon
+}
+C 41200 46200 1 270 0 jumper.sym
+{
+T 41400 46200 5 10 1 1 0 0 1
+refdes=J202
+T 41400 45900 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 43300 46100 5 8 0 0 270 0 1
+symversion=1.0
+T 41500 45900 5 8 0 1 270 0 1
+value=Jumper
+T 43500 46100 5 8 0 0 270 0 1
+value=jumper
+}
+N 41900 46100 42100 46100 4
+C 41200 45800 1 270 0 jumper.sym
+{
+T 41400 45800 5 10 1 1 0 0 1
+refdes=J203
+T 41400 45500 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 43300 45700 5 8 0 0 270 0 1
+symversion=1.0
+T 41500 45500 5 8 0 1 270 0 1
+value=Jumper
+T 43500 45700 5 8 0 0 270 0 1
+value=jumper
+}
+C 48800 51100 1 270 0 jumper.sym
+{
+T 49000 51100 5 10 1 1 0 0 1
+refdes=J204
+T 49000 50800 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 50900 51000 5 8 0 0 270 0 1
+symversion=1.0
+T 49100 50800 5 8 0 1 270 0 1
+value=Jumper
+T 51100 51000 5 8 0 0 270 0 1
+value=jumper
+}
+C 48800 49000 1 270 0 jumper.sym
+{
+T 49000 49000 5 10 1 1 0 0 1
+refdes=J205
+T 49000 48700 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 50900 48900 5 8 0 0 270 0 1
+symversion=1.0
+T 49100 48700 5 8 0 1 270 0 1
+value=Jumper
+T 51100 48900 5 8 0 0 270 0 1
+value=jumper
+}
+N 51800 49800 56700 49800 4
+{
+T 55800 49800 5 10 1 1 0 0 1
+netname=ADC0_IN2
 }
-C 42300 50000 1 0 0 generic-power.sym
+N 49800 49400 56700 49400 4
 {
-T 42500 50250 5 10 1 1 0 3 1
-net=VddPA:1
+T 55800 49400 5 10 1 1 0 0 1
+netname=ADC0_IN3
+}
+C 43600 51100 1 270 0 jumper.sym
+{
+T 43800 51100 5 10 1 1 0 0 1
+refdes=J200
+T 43800 50800 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 45700 51000 5 8 0 0 270 0 1
+symversion=1.0
+T 43900 50800 5 8 0 1 270 0 1
+value=Jumper
+T 45900 51000 5 8 0 0 270 0 1
+value=jumper
+}
+C 43600 49000 1 270 0 jumper.sym
+{
+T 43800 49000 5 10 1 1 0 0 1
+refdes=J201
+T 43800 48700 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 45700 48900 5 8 0 0 270 0 1
+symversion=1.0
+T 43900 48700 5 8 0 1 270 0 1
+value=Jumper
+T 45900 48900 5 8 0 0 270 0 1
+value=jumper
+}
+N 52600 50600 56700 50600 4
+{
+T 55800 50600 5 10 1 1 0 0 1
+netname=ADC0_IN0
 }
-C 42600 48900 1 0 1 gnd-1.sym
+N 52200 50200 56700 50200 4
 {
-T 42500 49050 5 10 1 1 0 6 1
+T 55800 50200 5 10 1 1 0 0 1
+netname=ADC0_IN1
+}
+C 52300 48400 1 0 1 generic-power.sym
+{
+T 52100 48650 5 10 1 1 0 3 1
+net=AVdd_atoi
+}
+N 42400 42800 48100 42800 4
+N 42400 42800 42400 45700 4
+N 41300 46100 40400 46100 4
+{
+T 40500 46100 5 10 1 1 0 0 1
+netname=DAC0_0
+}
+N 41300 45700 40400 45700 4
+{
+T 40500 45700 5 10 1 1 0 0 1
+netname=DAC0_1
+}
+N 46400 46900 48700 46900 4
+N 48700 46900 48700 45300 4
+C 54200 47800 1 270 0 jumper.sym
+{
+T 54400 47800 5 10 1 1 0 0 1
+refdes=J206
+T 54400 47500 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 56300 47700 5 8 0 0 270 0 1
+symversion=1.0
+T 54500 47500 5 8 0 1 270 0 1
+value=Jumper
+T 56500 47700 5 8 0 0 270 0 1
+value=jumper
+}
+C 54200 47400 1 270 0 jumper.sym
+{
+T 54400 47400 5 10 1 1 0 0 1
+refdes=J207
+T 54400 47100 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 56300 47300 5 8 0 0 270 0 1
+symversion=1.0
+T 54500 47100 5 8 0 1 270 0 1
+value=Jumper
+T 56500 47300 5 8 0 0 270 0 1
+value=jumper
+}
+N 54300 47700 54100 47700 4
+N 54300 47300 54100 47300 4
+N 54100 46500 54700 46500 4
+N 54100 46100 54600 46100 4
+N 54100 45300 54400 45300 4
+N 54100 44900 54700 44900 4
+C 52000 42700 1 0 0 gnd-1.sym
+{
+T 51900 42550 5 10 1 1 0 0 1
 net=AVSS:1
 }
-C 43000 51800 1 0 0 generic-power.sym
+C 40300 46000 1 0 0 flag-2.sym
+C 40300 45600 1 0 0 flag-2.sym
+C 55800 50100 1 0 0 flag-2.sym
+C 55800 50500 1 0 0 flag-2.sym
+C 55800 49700 1 0 0 flag-2.sym
+C 55800 49300 1 0 0 flag-2.sym
+C 55800 47600 1 0 0 flag-2.sym
+C 55800 47200 1 0 0 flag-2.sym
+C 55800 46000 1 0 0 flag-2.sym
+C 55800 45200 1 0 0 flag-2.sym
+N 44300 51000 44600 51000 4
+N 44600 51000 44600 52600 4
+N 44600 52600 52600 52600 4
+N 52600 52600 52600 50600 4
+N 44300 48900 44800 48900 4
+N 44800 48900 44800 52400 4
+N 44800 52400 52200 52400 4
+N 52200 52400 52200 50200 4
+N 49500 51000 51800 51000 4
+N 51800 51000 51800 49800 4
+N 49800 49400 49800 48900 4
+N 49800 48900 49500 48900 4
+N 48900 46900 48900 48000 4
+N 43100 48000 48900 48000 4
+N 41900 45700 42400 45700 4
+C 40300 42300 1 0 0 flag-2.sym
+C 40300 41900 1 0 0 flag-2.sym
+C 40300 41500 1 0 0 flag-2.sym
+C 49200 44600 1 270 0 jumper.sym
+{
+T 49400 44600 5 10 1 1 0 0 1
+refdes=J212
+T 49400 44300 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 51300 44500 5 8 0 0 270 0 1
+symversion=1.0
+T 49500 44300 5 8 0 1 270 0 1
+value=Jumper
+T 51500 44500 5 8 0 0 270 0 1
+value=jumper
+}
+C 49200 44200 1 270 0 jumper.sym
+{
+T 49400 44200 5 10 1 1 0 0 1
+refdes=J213
+T 49400 43900 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 51300 44100 5 8 0 0 270 0 1
+symversion=1.0
+T 49500 43900 5 8 0 1 270 0 1
+value=Jumper
+T 51500 44100 5 8 0 0 270 0 1
+value=jumper
+}
+C 49200 43800 1 270 0 jumper.sym
+{
+T 49400 43800 5 10 1 1 0 0 1
+refdes=J214
+T 49400 43500 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 51300 43700 5 8 0 0 270 0 1
+symversion=1.0
+T 49500 43500 5 8 0 1 270 0 1
+value=Jumper
+T 51500 43700 5 8 0 0 270 0 1
+value=jumper
+}
+N 49900 44500 50100 44500 4
+N 49900 44100 50100 44100 4
+N 49900 43700 50100 43700 4
+N 49300 44500 48400 44500 4
+N 48400 44500 48400 42400 4
+N 48700 42000 48700 44100 4
+N 48700 44100 49300 44100 4
+N 49300 43700 49100 43700 4
+N 49100 43700 49100 41600 4
+N 44300 44100 40400 44100 4
+{
+T 40500 44100 5 10 1 1 0 0 1
+netname=SCL
+}
+N 44300 43700 40400 43700 4
+{
+T 40500 43700 5 10 1 1 0 0 1
+netname=SDA
+}
+C 40300 44000 1 0 0 flag-2.sym
+C 40300 43600 1 0 0 flag-2.sym
+C 43200 46600 1 0 1 resistor-3.sym
+{
+T 42900 47200 5 10 1 1 0 6 1
+refdes=R213
+T 42900 47000 5 10 1 1 0 6 1
+value=10M
+T 42900 46800 5 10 1 1 0 6 1
+footprint=1206
+}
+N 43100 47500 43100 48000 4
+N 43100 46600 43100 46100 4
+C 47700 44500 1 0 0 resistor-3.sym
+{
+T 48000 45100 5 10 1 1 0 0 1
+refdes=R212
+T 48000 44800 5 10 1 1 0 0 1
+value=1k
+}
+N 47800 46500 47800 45400 4
+N 47800 44500 47800 42800 4
+C 47900 45600 1 0 0 resistor-3.sym
 {
-T 43200 52050 5 10 1 1 0 3 1
-net=VddPA:1
+T 48200 46200 5 10 1 1 180 8 1
+refdes=R214
+T 48200 46000 5 10 1 1 180 8 1
+value=10M
+T 48200 45800 5 10 1 1 180 8 1
+footprint=1206
 }
-C 43300 50700 1 0 1 gnd-1.sym
+N 48000 45600 48700 45600 4
+N 44000 47300 44300 47300 4
+N 49900 47700 50100 47700 4
+N 49900 47300 50100 47300 4
+N 49900 46100 50100 46100 4
+N 49900 45700 50100 45700 4
+C 55100 45800 1 0 1 jumper-3.sym
 {
-T 43200 50850 5 10 1 1 0 6 1
-net=AVSS:1
+T 55200 47700 5 8 0 0 0 6 1
+device=JUMPER-1xUM
+T 54800 46400 5 10 1 1 0 0 1
+refdes=J215
+T 55000 46700 5 10 0 1 0 6 1
+value=JMP
+T 55000 45600 5 8 0 1 0 6 1
+footprint=1x3PIN
 }
-N 43700 51200 44300 51200 4
-N 44300 51200 44300 49800 4
-C 50000 52100 1 0 0 generic-power.sym
+C 55100 45000 1 0 1 jumper-3.sym
 {
-T 50200 52350 5 10 1 1 0 3 1
-net=VddPA:1
+T 55200 46900 5 8 0 0 0 6 1
+device=JUMPER-1xUM
+T 54800 45600 5 10 1 1 0 0 1
+refdes=J216
+T 55000 45900 5 10 0 1 0 6 1
+value=JMP
+T 55000 44800 5 8 0 1 0 6 1
+footprint=1x3PIN
 }
-C 50300 51000 1 0 1 gnd-1.sym
+N 54700 46500 54700 46300 4
+N 54700 45900 54400 45900 4
+N 54400 45900 54400 45300 4
+N 54600 46100 54600 45500 4
+N 54600 45500 54700 45500 4
+N 54700 45100 54700 44900 4
+C 49300 47600 1 0 0 pad-l-2.sym
 {
-T 50200 51150 5 10 1 1 0 6 1
-net=AVSS:1
+T 49300 47800 5 10 1 1 0 0 1
+refdes=TP204
 }
-C 50200 50400 1 0 0 generic-power.sym
+C 49300 47200 1 0 0 pad-l-2.sym
 {
-T 50400 50650 5 10 1 1 0 3 1
-net=VddPA:1
+T 49300 47400 5 10 1 1 0 0 1
+refdes=TP205
 }
-C 50500 49300 1 0 1 gnd-1.sym
+C 49300 46000 1 0 0 pad-l-2.sym
 {
-T 50400 49450 5 10 1 1 0 6 1
-net=AVSS:1
+T 49300 46200 5 10 1 1 0 0 1
+refdes=TP206
 }
-N 49700 51500 49200 51500 4
-N 49200 51500 49200 50200 4
-N 43600 48300 43600 48000 4
-N 43600 48000 41400 48000 4
-N 41400 48000 41400 44100 4
-N 41400 44100 41600 44100 4
-N 44500 44100 49300 44100 4
-N 49300 44100 49300 48700 4
-N 41600 43300 40700 43300 4
-{
-T 40900 43300 5 10 1 1 0 0 1
-netname=CMI
+C 49300 45600 1 0 0 pad-l-2.sym
+{
+T 49300 45800 5 10 1 1 0 0 1
+refdes=TP207
+}
+C 43400 47200 1 0 0 pad-l-2.sym
+{
+T 43400 47400 5 10 1 1 0 0 1
+refdes=TP200
+}
+C 43400 46800 1 0 0 pad-l-2.sym
+{
+T 43400 47000 5 10 1 1 0 0 1
+refdes=TP201
+}
+C 46600 47200 1 0 0 pad-r-2.sym
+{
+T 46800 47400 5 10 1 1 0 0 1
+refdes=TP202
+}
+C 46400 46000 1 0 0 pad-r-2.sym
+{
+T 46600 46200 5 10 1 1 0 0 1
+refdes=TP203
 }

diff --git a/sch-pcb/devboard/atoi-3.sch b/sch-pcb/devboard/atoi-3.sch
index 53b50464d2cab8d06bdadc6f53a5e24888ef268d..4d305259f77a7ffe6b57c52d13cb8aee5f443247 100644 (file)
--- a/sch-pcb/devboard/atoi-3.sch
+++ b/sch-pcb/devboard/atoi-3.sch
@@ -10,32 +10,172 @@ auth=DJW
 T 49900 40900 5 8 1 1 0 0 1
 fname=$Id: $
 T 49900 41300 5 14 1 1 0 0 1
-title=TITLE
+title=AtoI - Bare OTA
 T 50600 40300 5 10 1 1 0 6 1
-pagenum=1
+pagenum=3
 T 52100 40300 5 10 1 1 0 6 1
-pageof=1
+pageof=??
 }
 C 46300 45200 1 0 0 wb430-3.sym
 {
 T 48300 47700 5 10 1 1 0 3 1
 refdes=AtoI0
 }
-C 44300 46600 1 0 0 flag.sym
-N 46300 46700 44800 46700 4
+C 41800 46600 1 0 0 flag.sym
+N 44400 46700 41900 46700 4
 {
-T 45000 46700 5 10 1 1 0 0 1
+T 42500 46700 5 10 1 1 0 0 1
 netname=INA
 }
-N 46300 46300 44800 46300 4
+N 44400 46300 41900 46300 4
 {
-T 45000 46300 5 10 1 1 0 0 1
+T 42500 46300 5 10 1 1 0 0 1
 netname=INB
 }
-N 46300 45900 44800 45900 4
+N 44400 45900 41900 45900 4
 {
-T 45000 45900 5 10 1 1 0 0 1
+T 42500 45900 5 10 1 1 0 0 1
 netname=CMI
 }
-C 44300 46200 1 0 0 flag.sym
-C 44300 45800 1 0 0 flag.sym
+C 41800 46200 1 0 0 flag.sym
+C 41800 45800 1 0 0 flag.sym
+C 44300 49200 1 270 0 jumper.sym
+{
+T 44500 49200 5 10 1 1 0 0 1
+refdes=J206
+T 44500 48900 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 46400 49100 5 8 0 0 270 0 1
+symversion=1.0
+T 44600 48900 5 8 0 1 270 0 1
+value=Jumper
+T 46600 49100 5 8 0 0 270 0 1
+value=jumper
+}
+C 44300 48800 1 270 0 jumper.sym
+{
+T 44500 48800 5 10 1 1 0 0 1
+refdes=J206
+T 44500 48500 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 46400 48700 5 8 0 0 270 0 1
+symversion=1.0
+T 44600 48500 5 8 0 1 270 0 1
+value=Jumper
+T 46600 48700 5 8 0 0 270 0 1
+value=jumper
+}
+C 44300 48400 1 270 0 jumper.sym
+{
+T 44500 48100 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 46400 48300 5 8 0 0 270 0 1
+symversion=1.0
+T 44600 48100 5 8 0 1 270 0 1
+value=Jumper
+T 46600 48300 5 8 0 0 270 0 1
+value=jumper
+T 44500 48400 5 10 1 1 0 0 1
+refdes=J206
+}
+C 44300 48000 1 270 0 jumper.sym
+{
+T 44500 47700 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 46400 47900 5 8 0 0 270 0 1
+symversion=1.0
+T 44600 47700 5 8 0 1 270 0 1
+value=Jumper
+T 46600 47900 5 8 0 0 270 0 1
+value=jumper
+T 44500 48000 5 10 1 1 0 0 1
+refdes=J206
+}
+C 44300 47600 1 270 0 jumper.sym
+{
+T 44500 47300 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 46400 47500 5 8 0 0 270 0 1
+symversion=1.0
+T 44600 47300 5 8 0 1 270 0 1
+value=Jumper
+T 46600 47500 5 8 0 0 270 0 1
+value=jumper
+T 44500 47600 5 10 1 1 0 0 1
+refdes=J206
+}
+C 44300 47200 1 270 0 jumper.sym
+{
+T 44500 46900 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 46400 47100 5 8 0 0 270 0 1
+symversion=1.0
+T 44600 46900 5 8 0 1 270 0 1
+value=Jumper
+T 46600 47100 5 8 0 0 270 0 1
+value=jumper
+T 44500 47200 5 10 1 1 0 0 1
+refdes=J206
+}
+C 44300 46800 1 270 0 jumper.sym
+{
+T 44500 46500 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 46400 46700 5 8 0 0 270 0 1
+symversion=1.0
+T 44600 46500 5 8 0 1 270 0 1
+value=Jumper
+T 46600 46700 5 8 0 0 270 0 1
+value=jumper
+T 44500 46800 5 10 1 1 0 0 1
+refdes=J206
+}
+C 44300 46400 1 270 0 jumper.sym
+{
+T 44500 46100 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 46400 46300 5 8 0 0 270 0 1
+symversion=1.0
+T 44600 46100 5 8 0 1 270 0 1
+value=Jumper
+T 46600 46300 5 8 0 0 270 0 1
+value=jumper
+T 44500 46400 5 10 1 1 0 0 1
+refdes=J206
+}
+C 44300 46000 1 270 0 jumper.sym
+{
+T 44500 45700 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 46400 45900 5 8 0 0 270 0 1
+symversion=1.0
+T 44600 45700 5 8 0 1 270 0 1
+value=Jumper
+T 46600 45900 5 8 0 0 270 0 1
+value=jumper
+T 44500 46000 5 10 1 1 0 0 1
+refdes=J206
+}
+N 45000 49100 46300 49100 4
+N 45000 48700 46300 48700 4
+N 45000 48300 46300 48300 4
+N 45000 47900 46300 47900 4
+N 45000 47500 46300 47500 4
+N 45000 47100 46300 47100 4
+N 45000 46700 46300 46700 4
+N 45000 46300 46300 46300 4
+N 45000 45900 46300 45900 4
+C 50800 49200 1 270 0 jumper.sym
+{
+T 51000 49200 5 10 1 1 0 0 1
+refdes=J206
+T 51000 48900 5 8 0 1 270 0 1
+footprint=JMP_2PIN
+T 52900 49100 5 8 0 0 270 0 1
+symversion=1.0
+T 51100 48900 5 8 0 1 270 0 1
+value=Jumper
+T 53100 49100 5 8 0 0 270 0 1
+value=jumper
+}
+N 50900 49100 50200 49100 4

diff --git a/sch-pcb/devboard/atoi-4.sch b/sch-pcb/devboard/atoi-4.sch
index 7fc370c19c7e468463db53df21d6cacceb7a6988..5fbffd0ea8ed9dd3c35bfdad6077a06d8e42bfba 100644 (file)
--- a/sch-pcb/devboard/atoi-4.sch
+++ b/sch-pcb/devboard/atoi-4.sch
@@ -10,11 +10,11 @@ auth=DJW
 T 49900 40900 5 8 1 1 0 0 1
 fname=$Id: $
 T 49900 41300 5 14 1 1 0 0 1
-title=TITLE
+title=AtoI - Markus' pins
 T 50600 40300 5 10 1 1 0 6 1
-pagenum=1
+pagenum=4
 T 52100 40300 5 10 1 1 0 6 1
-pageof=1
+pageof=??
 }
 C 47400 42500 1 0 0 wb430-4.sym
 {

diff --git a/sch-pcb/gschemrc b/sch-pcb/gschemrc
index 60fc45231febfd41fd2db924643251e4c522d23c..19fecf5ff5d1bee4a68e9cff4a536c5c2319fc48 100644 (file)
--- a/sch-pcb/gschemrc
+++ b/sch-pcb/gschemrc
@@ -4,4 +4,6 @@
 (define default-titleblock "title-wa-85x110.sym")
 (output-type "extents no margins")
 
+(net-selection-mode "enabled_all")
+
 ; vi:ft=scheme

diff --git a/sch-pcb/sym/pad-l-1.sym b/sch-pcb/sym/pad-l-1.sym
deleted file mode 100644 (file)
index cdada95..0000000
--- a/sch-pcb/sym/pad-l-1.sym
+++ /dev/null
@@ -1,11 +0,0 @@
-v 20111231 2
-P 500 100 800 100 1 0 1
-{
-T 600 200 5 10 0 1 0 0 1
-pinnumber=1
-T 600 200 5 10 0 0 0 0 1
-pinseq=1
-}
-T 300 100 8 10 1 1 0 7 1
-refdes=TP?
-V 400 100 100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1

diff --git a/sch-pcb/sym/pad-l-2.sym b/sch-pcb/sym/pad-l-2.sym
deleted file mode 100644 (file)
index 908c2e6..0000000
--- a/sch-pcb/sym/pad-l-2.sym
+++ /dev/null
@@ -1,11 +0,0 @@
-v 20111231 2
-P 500 100 800 100 1 0 1
-{
-T 600 200 5 10 0 1 0 0 1
-pinnumber=1
-T 600 200 5 10 0 0 0 0 1
-pinseq=1
-}
-T 200 200 8 10 1 1 0 0 1
-refdes=TP?
-V 400 100 100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1

diff --git a/sch-pcb/sym/pad-r-1.sym b/sch-pcb/sym/pad-r-1.sym
deleted file mode 100644 (file)
index 029d738..0000000
--- a/sch-pcb/sym/pad-r-1.sym
+++ /dev/null
@@ -1,11 +0,0 @@
-v 20111231 2
-P 0 100 300 100 1 0 0
-{
-T 100 200 5 10 0 1 0 0 1
-pinnumber=1
-T 100 200 5 10 0 0 0 0 1
-pinseq=1
-}
-T 500 100 8 10 1 1 0 1 1
-refdes=TP?
-V 400 100 100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1

diff --git a/sch-pcb/sym/pad-r-2.sym b/sch-pcb/sym/pad-r-2.sym
deleted file mode 100644 (file)
index 523a4cf..0000000
--- a/sch-pcb/sym/pad-r-2.sym
+++ /dev/null
@@ -1,11 +0,0 @@
-v 20111231 2
-P 0 100 300 100 1 0 0
-{
-T 100 200 5 10 0 1 0 0 1
-pinnumber=1
-T 100 200 5 10 0 0 0 0 1
-pinseq=1
-}
-T 200 200 8 10 1 1 0 0 1
-refdes=TP?
-V 400 100 100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1

diff --git a/sch-pcb/waeda-sym b/sch-pcb/waeda-sym
index 52c143596d796875393de429436b884cf55a1bed..a32ca3665d8d5c5088abae2ca6383583614b8b15 160000 (submodule)
--- a/sch-pcb/waeda-sym
+++ b/sch-pcb/waeda-sym
@@ -1 +1 @@
-Subproject commit 52c143596d796875393de429436b884cf55a1bed
+Subproject commit a32ca3665d8d5c5088abae2ca6383583614b8b15