Add initial ft4232 sym, need to split up

diff --git a/sch-pcb/sym/ft4232h-1.djboxsym b/sch-pcb/sym/ft4232h-1.djboxsym
new file mode 100644 (file)
index 0000000..8f2e3b8
--- /dev/null
+++ b/sch-pcb/sym/ft4232h-1.djboxsym
@@ -0,0 +1,92 @@
+
+
+[labels]
+refdes=FTDI
+FT4232H
+! footprint=LQFP-50P-1330L1-1330L2-64N__Philips
+! document=FT4232H.pdf
+
+[left]
+1      p       GND
+2      i       OSCI
+3      o       OSCO
+4      p       VPHY
+5      p       GND
+6              REF
+7      io      DM
+8      io      DP
+9      p       VPLL
+10     p       AGND
+11     p       GND
+12     p       VCORE
+13             TEST
+14     i!      \_RESET\_
+15     p       GND
+
+#ch A
+16     io      ADBUS0/TXD/TCK/SK
+17     io      ADBUS1/RXD/TDI/DO
+18     io      ADBUS2/\_RTS\_/TDO/DI
+19     io      ADBUS3/\_CTS\_/TMS/CS
+20     p       VCCIO
+21     io      ADBUS4/\_DTR\_/GPIOL0
+22     io      ADBUS5/\_DSR\_/GPIOL1
+23     io      ADBUS6/\_DCD\_/GPIOL2
+24     io      ADBUS7/\_RI\_/GPIOL3
+25     p       GND
+#ch B
+26     io      BDBUS0/TXD/TCK/SK
+27     io      BDBUS1/RXD/TDI/DO
+28     io      BDBUS2/\_RTS\_/TDO/DI
+29     io      BDBUS3/\_CTS\_/TMS/CS
+30     io      BDBUS4/\_DTR\_/GPIOL0
+31     p       VCCIO
+32     io      BDBUS5/\_DSR\_/GPIOL1
+33     io      BDBUS6/\_DCD\_/GPIOL2
+34     io      BDBUS7/\_RI\_/GPIOL3
+35     p       GND
+
+
+36     o       \_SUSPEND\_
+
+37     p       VCORE
+
+
+#ch C
+38     io      CDBUS0/TXD
+39     io      CDBUS1/RXD
+40     io      CDBUS2/\_RTS\_
+41     io      CDBUS3/\_CTS\_
+42     p       VCCIO
+43     io      CDBUS4/\_DTR\_
+44     io      CDBUS5/\_DSR\_
+45     io      CDBUS6/\_DCD\_
+46     io      CDBUS7/\_RI\_
+47     p       GND
+#ch D
+48     io      DDBUS0/TXD
+
+49     p       VREGOUT
+50     p       VREGIN
+51     p       GND
+
+52     io      DDBUS1/RXD
+53     io      DDBUS2/\_RTS\_
+54     io      DDBUS3/\_CTS\_
+55     io      DDBUS4/\_DTR\_
+56     p       VCCIO
+57     io      DDBUS5/\_DSR\_
+58     io      DDBUS6/\_DCD\_
+59     io      DDBUS7/\_RI\_
+
+
+60     o       \_PWREN\_
+
+61     io      EEDATA
+62     o       EECLK
+63     io      EECS
+
+64     p       VCORE
+
+
+# vim:softtabstop=0 noexpandtab ft=sh

diff --git a/sch-pcb/sym/ft4232h-1.sym b/sch-pcb/sym/ft4232h-1.sym
new file mode 100644 (file)
index 0000000..5214cd7
--- /dev/null
+++ b/sch-pcb/sym/ft4232h-1.sym
@@ -0,0 +1,715 @@
+v 20060123 1
+B 300 300 2100 29600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 2400 30000 9 10 0 0 0 0 1
+document=FT4232H.pdf
+T 2400 30200 9 10 0 0 0 0 1
+footprint=LQFP-50P-1330L1-1330L2-64N__Philips
+T 1400 29300 9 10 1 1 0 3 1
+refdes=FTDI
+T 1400 28900 9 10 1 1 0 3 1
+FT4232H
+P 0 29500 300 29500 1 0 0
+{
+T 350 29500 9 10 1 1 0 1 1
+pinlabel=GND
+T 200 29550 5 8 1 1 0 6 1
+pinnumber=1
+T 200 29550 5 8 0 1 0 6 1
+pinseq=1
+T 200 29550 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 29100 300 29100 1 0 0
+{
+T 350 29100 9 10 1 1 0 1 1
+pinlabel=OSCI
+T 200 29150 5 8 1 1 0 6 1
+pinnumber=2
+T 200 29150 5 8 0 1 0 6 1
+pinseq=2
+T 200 29150 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 28700 300 28700 1 0 0
+{
+T 350 28700 9 10 1 1 0 1 1
+pinlabel=OSCO
+T 200 28750 5 8 1 1 0 6 1
+pinnumber=3
+T 200 28750 5 8 0 1 0 6 1
+pinseq=3
+T 200 28750 9 10 0 1 0 6 1
+pintype=out
+}
+P 0 28300 300 28300 1 0 0
+{
+T 350 28300 9 10 1 1 0 1 1
+pinlabel=VPHY
+T 200 28350 5 8 1 1 0 6 1
+pinnumber=4
+T 200 28350 5 8 0 1 0 6 1
+pinseq=4
+T 200 28350 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 27900 300 27900 1 0 0
+{
+T 350 27900 9 10 1 1 0 1 1
+pinlabel=GND
+T 200 27950 5 8 1 1 0 6 1
+pinnumber=5
+T 200 27950 5 8 0 1 0 6 1
+pinseq=5
+T 200 27950 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 27500 300 27500 1 0 0
+{
+T 350 27500 9 10 1 1 0 1 1
+pinlabel=REF
+T 200 27550 5 8 1 1 0 6 1
+pinnumber=6
+T 200 27550 5 8 0 1 0 6 1
+pinseq=6
+T 200 27550 9 10 0 1 0 6 1
+pintype=pas
+}
+P 0 27100 300 27100 1 0 0
+{
+T 350 27100 9 10 1 1 0 1 1
+pinlabel=DM
+T 200 27150 5 8 1 1 0 6 1
+pinnumber=7
+T 200 27150 5 8 0 1 0 6 1
+pinseq=7
+T 200 27150 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 26700 300 26700 1 0 0
+{
+T 350 26700 9 10 1 1 0 1 1
+pinlabel=DP
+T 200 26750 5 8 1 1 0 6 1
+pinnumber=8
+T 200 26750 5 8 0 1 0 6 1
+pinseq=8
+T 200 26750 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 26300 300 26300 1 0 0
+{
+T 350 26300 9 10 1 1 0 1 1
+pinlabel=VPLL
+T 200 26350 5 8 1 1 0 6 1
+pinnumber=9
+T 200 26350 5 8 0 1 0 6 1
+pinseq=9
+T 200 26350 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 25900 300 25900 1 0 0
+{
+T 350 25900 9 10 1 1 0 1 1
+pinlabel=AGND
+T 200 25950 5 8 1 1 0 6 1
+pinnumber=10
+T 200 25950 5 8 0 1 0 6 1
+pinseq=10
+T 200 25950 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 25500 300 25500 1 0 0
+{
+T 350 25500 9 10 1 1 0 1 1
+pinlabel=GND
+T 200 25550 5 8 1 1 0 6 1
+pinnumber=11
+T 200 25550 5 8 0 1 0 6 1
+pinseq=11
+T 200 25550 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 25100 300 25100 1 0 0
+{
+T 350 25100 9 10 1 1 0 1 1
+pinlabel=VCORE
+T 200 25150 5 8 1 1 0 6 1
+pinnumber=12
+T 200 25150 5 8 0 1 0 6 1
+pinseq=12
+T 200 25150 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 24700 300 24700 1 0 0
+{
+T 350 24700 9 10 1 1 0 1 1
+pinlabel=TEST
+T 200 24750 5 8 1 1 0 6 1
+pinnumber=13
+T 200 24750 5 8 0 1 0 6 1
+pinseq=13
+T 200 24750 9 10 0 1 0 6 1
+pintype=pas
+}
+V 250 24300 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 0 24300 200 24300 1 0 0
+{
+T 350 24300 9 10 1 1 0 1 1
+pinlabel=\_RESET\_
+T 200 24350 5 8 1 1 0 6 1
+pinnumber=14
+T 200 24350 5 8 0 1 0 6 1
+pinseq=14
+T 200 24350 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 23900 300 23900 1 0 0
+{
+T 350 23900 9 10 1 1 0 1 1
+pinlabel=GND
+T 200 23950 5 8 1 1 0 6 1
+pinnumber=15
+T 200 23950 5 8 0 1 0 6 1
+pinseq=15
+T 200 23950 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 23100 300 23100 1 0 0
+{
+T 350 23100 9 10 1 1 0 1 1
+pinlabel=ADBUS0/TXD/TCK/SK
+T 200 23150 5 8 1 1 0 6 1
+pinnumber=16
+T 200 23150 5 8 0 1 0 6 1
+pinseq=16
+T 200 23150 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 22700 300 22700 1 0 0
+{
+T 350 22700 9 10 1 1 0 1 1
+pinlabel=ADBUS1/RXD/TDI/DO
+T 200 22750 5 8 1 1 0 6 1
+pinnumber=17
+T 200 22750 5 8 0 1 0 6 1
+pinseq=17
+T 200 22750 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 22300 300 22300 1 0 0
+{
+T 350 22300 9 10 1 1 0 1 1
+pinlabel=ADBUS2/\_RTS\_/TDO/DI
+T 200 22350 5 8 1 1 0 6 1
+pinnumber=18
+T 200 22350 5 8 0 1 0 6 1
+pinseq=18
+T 200 22350 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 21900 300 21900 1 0 0
+{
+T 350 21900 9 10 1 1 0 1 1
+pinlabel=ADBUS3/\_CTS\_/TMS/CS
+T 200 21950 5 8 1 1 0 6 1
+pinnumber=19
+T 200 21950 5 8 0 1 0 6 1
+pinseq=19
+T 200 21950 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 21500 300 21500 1 0 0
+{
+T 350 21500 9 10 1 1 0 1 1
+pinlabel=VCCIO
+T 200 21550 5 8 1 1 0 6 1
+pinnumber=20
+T 200 21550 5 8 0 1 0 6 1
+pinseq=20
+T 200 21550 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 21100 300 21100 1 0 0
+{
+T 350 21100 9 10 1 1 0 1 1
+pinlabel=ADBUS4/\_DTR\_/GPIOL0
+T 200 21150 5 8 1 1 0 6 1
+pinnumber=21
+T 200 21150 5 8 0 1 0 6 1
+pinseq=21
+T 200 21150 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 20700 300 20700 1 0 0
+{
+T 350 20700 9 10 1 1 0 1 1
+pinlabel=ADBUS5/\_DSR\_/GPIOL1
+T 200 20750 5 8 1 1 0 6 1
+pinnumber=22
+T 200 20750 5 8 0 1 0 6 1
+pinseq=22
+T 200 20750 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 20300 300 20300 1 0 0
+{
+T 350 20300 9 10 1 1 0 1 1
+pinlabel=ADBUS6/\_DCD\_/GPIOL2
+T 200 20350 5 8 1 1 0 6 1
+pinnumber=23
+T 200 20350 5 8 0 1 0 6 1
+pinseq=23
+T 200 20350 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 19900 300 19900 1 0 0
+{
+T 350 19900 9 10 1 1 0 1 1
+pinlabel=ADBUS7/\_RI\_/GPIOL3
+T 200 19950 5 8 1 1 0 6 1
+pinnumber=24
+T 200 19950 5 8 0 1 0 6 1
+pinseq=24
+T 200 19950 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 19500 300 19500 1 0 0
+{
+T 350 19500 9 10 1 1 0 1 1
+pinlabel=GND
+T 200 19550 5 8 1 1 0 6 1
+pinnumber=25
+T 200 19550 5 8 0 1 0 6 1
+pinseq=25
+T 200 19550 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 19100 300 19100 1 0 0
+{
+T 350 19100 9 10 1 1 0 1 1
+pinlabel=BDBUS0/TXD/TCK/SK
+T 200 19150 5 8 1 1 0 6 1
+pinnumber=26
+T 200 19150 5 8 0 1 0 6 1
+pinseq=26
+T 200 19150 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 18700 300 18700 1 0 0
+{
+T 350 18700 9 10 1 1 0 1 1
+pinlabel=BDBUS1/RXD/TDI/DO
+T 200 18750 5 8 1 1 0 6 1
+pinnumber=27
+T 200 18750 5 8 0 1 0 6 1
+pinseq=27
+T 200 18750 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 18300 300 18300 1 0 0
+{
+T 350 18300 9 10 1 1 0 1 1
+pinlabel=BDBUS2/\_RTS\_/TDO/DI
+T 200 18350 5 8 1 1 0 6 1
+pinnumber=28
+T 200 18350 5 8 0 1 0 6 1
+pinseq=28
+T 200 18350 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 17900 300 17900 1 0 0
+{
+T 350 17900 9 10 1 1 0 1 1
+pinlabel=BDBUS3/\_CTS\_/TMS/CS
+T 200 17950 5 8 1 1 0 6 1
+pinnumber=29
+T 200 17950 5 8 0 1 0 6 1
+pinseq=29
+T 200 17950 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 17500 300 17500 1 0 0
+{
+T 350 17500 9 10 1 1 0 1 1
+pinlabel=BDBUS4/\_DTR\_/GPIOL0
+T 200 17550 5 8 1 1 0 6 1
+pinnumber=30
+T 200 17550 5 8 0 1 0 6 1
+pinseq=30
+T 200 17550 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 17100 300 17100 1 0 0
+{
+T 350 17100 9 10 1 1 0 1 1
+pinlabel=VCCIO
+T 200 17150 5 8 1 1 0 6 1
+pinnumber=31
+T 200 17150 5 8 0 1 0 6 1
+pinseq=31
+T 200 17150 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 16700 300 16700 1 0 0
+{
+T 350 16700 9 10 1 1 0 1 1
+pinlabel=BDBUS5/\_DSR\_/GPIOL1
+T 200 16750 5 8 1 1 0 6 1
+pinnumber=32
+T 200 16750 5 8 0 1 0 6 1
+pinseq=32
+T 200 16750 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 16300 300 16300 1 0 0
+{
+T 350 16300 9 10 1 1 0 1 1
+pinlabel=BDBUS6/\_DCD\_/GPIOL2
+T 200 16350 5 8 1 1 0 6 1
+pinnumber=33
+T 200 16350 5 8 0 1 0 6 1
+pinseq=33
+T 200 16350 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 15900 300 15900 1 0 0
+{
+T 350 15900 9 10 1 1 0 1 1
+pinlabel=BDBUS7/\_RI\_/GPIOL3
+T 200 15950 5 8 1 1 0 6 1
+pinnumber=34
+T 200 15950 5 8 0 1 0 6 1
+pinseq=34
+T 200 15950 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 15500 300 15500 1 0 0
+{
+T 350 15500 9 10 1 1 0 1 1
+pinlabel=GND
+T 200 15550 5 8 1 1 0 6 1
+pinnumber=35
+T 200 15550 5 8 0 1 0 6 1
+pinseq=35
+T 200 15550 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 14700 300 14700 1 0 0
+{
+T 350 14700 9 10 1 1 0 1 1
+pinlabel=\_SUSPEND\_
+T 200 14750 5 8 1 1 0 6 1
+pinnumber=36
+T 200 14750 5 8 0 1 0 6 1
+pinseq=36
+T 200 14750 9 10 0 1 0 6 1
+pintype=out
+}
+P 0 13900 300 13900 1 0 0
+{
+T 350 13900 9 10 1 1 0 1 1
+pinlabel=VCORE
+T 200 13950 5 8 1 1 0 6 1
+pinnumber=37
+T 200 13950 5 8 0 1 0 6 1
+pinseq=37
+T 200 13950 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 13100 300 13100 1 0 0
+{
+T 350 13100 9 10 1 1 0 1 1
+pinlabel=CDBUS0/TXD
+T 200 13150 5 8 1 1 0 6 1
+pinnumber=38
+T 200 13150 5 8 0 1 0 6 1
+pinseq=38
+T 200 13150 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 12700 300 12700 1 0 0
+{
+T 350 12700 9 10 1 1 0 1 1
+pinlabel=CDBUS1/RXD
+T 200 12750 5 8 1 1 0 6 1
+pinnumber=39
+T 200 12750 5 8 0 1 0 6 1
+pinseq=39
+T 200 12750 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 12300 300 12300 1 0 0
+{
+T 350 12300 9 10 1 1 0 1 1
+pinlabel=CDBUS2/\_RTS\_
+T 200 12350 5 8 1 1 0 6 1
+pinnumber=40
+T 200 12350 5 8 0 1 0 6 1
+pinseq=40
+T 200 12350 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 11900 300 11900 1 0 0
+{
+T 350 11900 9 10 1 1 0 1 1
+pinlabel=CDBUS3/\_CTS\_
+T 200 11950 5 8 1 1 0 6 1
+pinnumber=41
+T 200 11950 5 8 0 1 0 6 1
+pinseq=41
+T 200 11950 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 11500 300 11500 1 0 0
+{
+T 350 11500 9 10 1 1 0 1 1
+pinlabel=VCCIO
+T 200 11550 5 8 1 1 0 6 1
+pinnumber=42
+T 200 11550 5 8 0 1 0 6 1
+pinseq=42
+T 200 11550 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 11100 300 11100 1 0 0
+{
+T 350 11100 9 10 1 1 0 1 1
+pinlabel=CDBUS4/\_DTR\_
+T 200 11150 5 8 1 1 0 6 1
+pinnumber=43
+T 200 11150 5 8 0 1 0 6 1
+pinseq=43
+T 200 11150 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 10700 300 10700 1 0 0
+{
+T 350 10700 9 10 1 1 0 1 1
+pinlabel=CDBUS5/\_DSR\_
+T 200 10750 5 8 1 1 0 6 1
+pinnumber=44
+T 200 10750 5 8 0 1 0 6 1
+pinseq=44
+T 200 10750 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 10300 300 10300 1 0 0
+{
+T 350 10300 9 10 1 1 0 1 1
+pinlabel=CDBUS6/\_DCD\_
+T 200 10350 5 8 1 1 0 6 1
+pinnumber=45
+T 200 10350 5 8 0 1 0 6 1
+pinseq=45
+T 200 10350 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 9900 300 9900 1 0 0
+{
+T 350 9900 9 10 1 1 0 1 1
+pinlabel=CDBUS7/\_RI\_
+T 200 9950 5 8 1 1 0 6 1
+pinnumber=46
+T 200 9950 5 8 0 1 0 6 1
+pinseq=46
+T 200 9950 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 9500 300 9500 1 0 0
+{
+T 350 9500 9 10 1 1 0 1 1
+pinlabel=GND
+T 200 9550 5 8 1 1 0 6 1
+pinnumber=47
+T 200 9550 5 8 0 1 0 6 1
+pinseq=47
+T 200 9550 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 9100 300 9100 1 0 0
+{
+T 350 9100 9 10 1 1 0 1 1
+pinlabel=DDBUS0/TXD
+T 200 9150 5 8 1 1 0 6 1
+pinnumber=48
+T 200 9150 5 8 0 1 0 6 1
+pinseq=48
+T 200 9150 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 8300 300 8300 1 0 0
+{
+T 350 8300 9 10 1 1 0 1 1
+pinlabel=VREGOUT
+T 200 8350 5 8 1 1 0 6 1
+pinnumber=49
+T 200 8350 5 8 0 1 0 6 1
+pinseq=49
+T 200 8350 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 7900 300 7900 1 0 0
+{
+T 350 7900 9 10 1 1 0 1 1
+pinlabel=VREGIN
+T 200 7950 5 8 1 1 0 6 1
+pinnumber=50
+T 200 7950 5 8 0 1 0 6 1
+pinseq=50
+T 200 7950 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 7500 300 7500 1 0 0
+{
+T 350 7500 9 10 1 1 0 1 1
+pinlabel=GND
+T 200 7550 5 8 1 1 0 6 1
+pinnumber=51
+T 200 7550 5 8 0 1 0 6 1
+pinseq=51
+T 200 7550 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 6700 300 6700 1 0 0
+{
+T 350 6700 9 10 1 1 0 1 1
+pinlabel=DDBUS1/RXD
+T 200 6750 5 8 1 1 0 6 1
+pinnumber=52
+T 200 6750 5 8 0 1 0 6 1
+pinseq=52
+T 200 6750 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 6300 300 6300 1 0 0
+{
+T 350 6300 9 10 1 1 0 1 1
+pinlabel=DDBUS2/\_RTS\_
+T 200 6350 5 8 1 1 0 6 1
+pinnumber=53
+T 200 6350 5 8 0 1 0 6 1
+pinseq=53
+T 200 6350 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 5900 300 5900 1 0 0
+{
+T 350 5900 9 10 1 1 0 1 1
+pinlabel=DDBUS3/\_CTS\_
+T 200 5950 5 8 1 1 0 6 1
+pinnumber=54
+T 200 5950 5 8 0 1 0 6 1
+pinseq=54
+T 200 5950 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 5500 300 5500 1 0 0
+{
+T 350 5500 9 10 1 1 0 1 1
+pinlabel=DDBUS4/\_DTR\_
+T 200 5550 5 8 1 1 0 6 1
+pinnumber=55
+T 200 5550 5 8 0 1 0 6 1
+pinseq=55
+T 200 5550 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 5100 300 5100 1 0 0
+{
+T 350 5100 9 10 1 1 0 1 1
+pinlabel=VCCIO
+T 200 5150 5 8 1 1 0 6 1
+pinnumber=56
+T 200 5150 5 8 0 1 0 6 1
+pinseq=56
+T 200 5150 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 4700 300 4700 1 0 0
+{
+T 350 4700 9 10 1 1 0 1 1
+pinlabel=DDBUS5/\_DSR\_
+T 200 4750 5 8 1 1 0 6 1
+pinnumber=57
+T 200 4750 5 8 0 1 0 6 1
+pinseq=57
+T 200 4750 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 4300 300 4300 1 0 0
+{
+T 350 4300 9 10 1 1 0 1 1
+pinlabel=DDBUS6/\_DCD\_
+T 200 4350 5 8 1 1 0 6 1
+pinnumber=58
+T 200 4350 5 8 0 1 0 6 1
+pinseq=58
+T 200 4350 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 3900 300 3900 1 0 0
+{
+T 350 3900 9 10 1 1 0 1 1
+pinlabel=DDBUS7/\_RI\_
+T 200 3950 5 8 1 1 0 6 1
+pinnumber=59
+T 200 3950 5 8 0 1 0 6 1
+pinseq=59
+T 200 3950 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 3100 300 3100 1 0 0
+{
+T 350 3100 9 10 1 1 0 1 1
+pinlabel=\_PWREN\_
+T 200 3150 5 8 1 1 0 6 1
+pinnumber=60
+T 200 3150 5 8 0 1 0 6 1
+pinseq=60
+T 200 3150 9 10 0 1 0 6 1
+pintype=out
+}
+P 0 2300 300 2300 1 0 0
+{
+T 350 2300 9 10 1 1 0 1 1
+pinlabel=EEDATA
+T 200 2350 5 8 1 1 0 6 1
+pinnumber=61
+T 200 2350 5 8 0 1 0 6 1
+pinseq=61
+T 200 2350 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 1900 300 1900 1 0 0
+{
+T 350 1900 9 10 1 1 0 1 1
+pinlabel=EECLK
+T 200 1950 5 8 1 1 0 6 1
+pinnumber=62
+T 200 1950 5 8 0 1 0 6 1
+pinseq=62
+T 200 1950 9 10 0 1 0 6 1
+pintype=out
+}
+P 0 1500 300 1500 1 0 0
+{
+T 350 1500 9 10 1 1 0 1 1
+pinlabel=EECS
+T 200 1550 5 8 1 1 0 6 1
+pinnumber=63
+T 200 1550 5 8 0 1 0 6 1
+pinseq=63
+T 200 1550 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 700 300 700 1 0 0
+{
+T 350 700 9 10 1 1 0 1 1
+pinlabel=VCORE
+T 200 750 5 8 1 1 0 6 1
+pinnumber=64
+T 200 750 5 8 0 1 0 6 1
+pinseq=64
+T 200 750 9 10 0 1 0 6 1
+pintype=pwr
+}