From: drowe67 Date: Fri, 11 Jul 2014 06:57:38 +0000 (+0000) Subject: modified DAC driver to be two channels for SM1000, not tested yet X-Git-Url: http://git.whiteaudio.com/gitweb/?a=commitdiff_plain;h=4c7890f37bb06f23562c46d2b8ce9046486049d9;p=freetel-svn-tracking.git modified DAC driver to be two channels for SM1000, not tested yet git-svn-id: https://svn.code.sf.net/p/freetel/code@1756 01035d8c-6547-0410-b346-abe4f91aad63 --- diff --git a/codec2-dev/stm32/src/dac_play.c b/codec2-dev/stm32/src/dac_play.c index ba0ec1ab..afed3f8c 100644 --- a/codec2-dev/stm32/src/dac_play.c +++ b/codec2-dev/stm32/src/dac_play.c @@ -4,7 +4,7 @@ AUTHOR......: David Rowe DATE CREATED: 1 June 2013 - Plays a 16 kHz sample rate raw file to the STM32F4 DAC. + Plays a 16 kHz sample rate raw file to the STM32F4 pin PA5. \*---------------------------------------------------------------------------*/ @@ -47,7 +47,7 @@ int main(void) { printf("Starting!\n"); while(fread(buf, sizeof(short), N, fplay) == N) { - while(dac_write(buf, N) == -1); + while(dac2_write(buf, N) == -1); } printf("Finished!\n"); diff --git a/codec2-dev/stm32/src/dac_ut.c b/codec2-dev/stm32/src/dac_ut.c index 139dc759..58f8ac4d 100644 --- a/codec2-dev/stm32/src/dac_ut.c +++ b/codec2-dev/stm32/src/dac_ut.c @@ -4,7 +4,8 @@ AUTHOR......: David Rowe DATE CREATED: May 31 2013 - Plays a 500 Hz sine wave sampled at 16 kHz out of PA5 on a Discovery board. + Plays a 500 Hz sine wave sampled at 16 kHz out of PA5 on a Discovery board, + or the speaker output of the SM1000. \*---------------------------------------------------------------------------*/ @@ -43,18 +44,13 @@ short aSine[] = { }; int main(void) { - int i; - - //for(i=0; i<32; i++) - // aSine[i] /= 2; - dac_open(); while (1) { /* keep DAC FIFO topped up */ - dac_write((short*)aSine, SINE_SAMPLES); + dac1_write((short*)aSine, SINE_SAMPLES); } } diff --git a/codec2-dev/stm32/src/power_ut.c b/codec2-dev/stm32/src/power_ut.c index c094aef8..fc45a8ea 100644 --- a/codec2-dev/stm32/src/power_ut.c +++ b/codec2-dev/stm32/src/power_ut.c @@ -5,7 +5,7 @@ DATE CREATED: 30 May 2014 Runs Codec 2, ADC, and DAC, to fully exercise STM32C so we can a feel for - run-time power consumption for SmartMic and hence dimension regulators. + run-time power consumption for SM1000 and hence dimension regulators. \*---------------------------------------------------------------------------*/ @@ -51,7 +51,7 @@ #define SPEED_TEST_SAMPLES 24000 -/* modifiaction of test used to measure codec2 execuation speed. We read/write ADC/DAC +/* modification of test used to measure codec2 execuation speed. We read/write ADC/DAC but dont do anything with the samples, as they are at 16 kHz and codec needs 8 kHz. Just trying to exercise everything to get a feel for power consumption */ @@ -101,7 +101,7 @@ static void c2speedtest(int mode, char inputfile[]) codec2_decode(codec2, outbuf, bits); //printf("write to DAC\n"); - while(dac_write(dummy_buf, nsam*2) == -1); /* runs at Fs = 16kHz */ + while(dac1_write(dummy_buf, nsam*2) == -1); /* runs at Fs = 16kHz */ //printf("."); } diff --git a/codec2-dev/stm32/src/stm32f4_dac.c b/codec2-dev/stm32/src/stm32f4_dac.c index caa43ce3..973dd5b8 100644 --- a/codec2-dev/stm32/src/stm32f4_dac.c +++ b/codec2-dev/stm32/src/stm32f4_dac.c @@ -37,38 +37,34 @@ #define DAC_BUF_SZ 320 #define FIFO_SZ 4*DAC_BUF_SZ -#define DAC_MAX 4096 +#define DAC_MAX 4096 /* maximum amplitude */ DAC_InitTypeDef DAC_InitStructure; -struct FIFO *DMA1_Stream6_fifo; +struct FIFO *dac1_fifo; +struct FIFO *dac2_fifo; -unsigned short dac_buf[DAC_BUF_SZ]; +unsigned short dac1_buf[DAC_BUF_SZ]; +unsigned short dac2_buf[DAC_BUF_SZ]; -static void TIM6_Config(void); -static void DAC_Ch2_Config(void); +static void tim6_config(void); +static void dac1_config(void); +static void dac2_config(void); int dac_underflow; void dac_open(void) { - memset(dac_buf, 32768, sizeof(short)*DAC_BUF_SZ); + memset(dac1_buf, 32768, sizeof(short)*DAC_BUF_SZ); + memset(dac2_buf, 32768, sizeof(short)*DAC_BUF_SZ); - /* Create fifo */ + /* Create fifos */ - DMA1_Stream6_fifo = fifo_create(FIFO_SZ); - assert(DMA1_Stream6_fifo != NULL); + dac1_fifo = fifo_create(FIFO_SZ); + dac2_fifo = fifo_create(FIFO_SZ); + assert(dac1_fifo != NULL); + assert(dac2_fifo != NULL); - /*!< At this stage the microcontroller clock setting is already configured, - this is done through SystemInit() function which is called from startup - files (startup_stm32f40xx.s/startup_stm32f427x.s) before to branch to - application main. - To reconfigure the default setting of SystemInit() function, refer to - system_stm32f4xx.c file - */ - - /* Preconfiguration before using DAC----------------------------------------*/ - - GPIO_InitTypeDef GPIO_InitStructure; + /* Turn on the clocks we need -----------------------------------------------*/ /* DMA1 clock enable */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); @@ -77,35 +73,36 @@ void dac_open(void) { /* DAC Periph clock enable */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE); - /* DAC channel 1 & 2 (DAC_OUT1 = PA.4)(DAC_OUT2 = PA.5) configuration */ + /* GPIO Pin configuration DAC1->PA.4, DAC2->PA.5 configuration --------------*/ + + GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(GPIOA, &GPIO_InitStructure); - /* TIM6 Configuration ------------------------------------------------------*/ + /* Timer and DAC 1 & 2 Configuration ----------------------------------------*/ - TIM6_Config(); - DAC_Ch2_Config(); - + tim6_config(); + dac1_config(); + dac2_config(); } -/* Accepts signed 16 bit samples */ +/* Call these puppies to send samples to the DACs. For your + convenience they accept signed 16 bit samples. */ + +int dac1_write(short buf[], int n) { + return fifo_write(dac1_fifo, buf, n); +} -int dac_write(short buf[], int n) { - return fifo_write(DMA1_Stream6_fifo, buf, n); +int dac2_write(short buf[], int n) { + return fifo_write(dac2_fifo, buf, n); } -/** - * @brief TIM6 Configuration - * @note TIM6 configuration is based on APB1 frequency - * @note TIM6 Update event occurs each TIM6CLK/256 - * @param None - * @retval None - */ -static void TIM6_Config(void) +static void tim6_config(void) { TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; + /* TIM6 Periph clock enable */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6, ENABLE); @@ -121,6 +118,7 @@ static void TIM6_Config(void) ----------------------------------------------------------- */ /* Time base configuration */ + TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); TIM_TimeBaseStructure.TIM_Period = 5250; TIM_TimeBaseStructure.TIM_Prescaler = 0; @@ -133,30 +131,86 @@ static void TIM6_Config(void) TIM_SelectOutputTrigger(TIM6, TIM_TRGOSource_Update); /* TIM6 enable counter */ + TIM_Cmd(TIM6, ENABLE); } -/** - * @brief DAC Channel2 SineWave Configuration - * @param None - * @retval None - */ -static void DAC_Ch2_Config(void) +static void dac1_config(void) +{ + DMA_InitTypeDef DMA_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + /* DAC channel11Configuration */ + + DAC_InitStructure.DAC_Trigger = DAC_Trigger_T6_TRGO; + DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None; + DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Disable; + DAC_Init(DAC_Channel_1, &DAC_InitStructure); + + /* DMA1_Stream5 channel7 configuration **************************************/ + /* Table 35 page 219 of the monster data sheet */ + + DMA_DeInit(DMA1_Stream5); + DMA_InitStructure.DMA_Channel = DMA_Channel_7; + DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)DAC_DHR12R2_ADDRESS; + DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)dac1_buf; + DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; + DMA_InitStructure.DMA_BufferSize = DAC_BUF_SZ; + DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; + DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; + DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; + DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; + DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; + DMA_InitStructure.DMA_Priority = DMA_Priority_High; + DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; + DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; + DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; + DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; + DMA_Init(DMA1_Stream6, &DMA_InitStructure); + + /* Enable DMA Half & Complete interrupts */ + + DMA_ITConfig(DMA1_Stream5, DMA_IT_TC | DMA_IT_HT, ENABLE); + + /* Enable the DMA Stream IRQ Channel */ + + NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream5_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + /* Enable DMA1_Stream5 */ + + DMA_Cmd(DMA1_Stream5, ENABLE); + + /* Enable DAC Channel 1 */ + + DAC_Cmd(DAC_Channel_1, ENABLE); + + /* Enable DMA for DAC Channel 1 */ + + DAC_DMACmd(DAC_Channel_1, ENABLE); +} + +static void dac2_config(void) { DMA_InitTypeDef DMA_InitStructure; NVIC_InitTypeDef NVIC_InitStructure; /* DAC channel2 Configuration */ + DAC_InitStructure.DAC_Trigger = DAC_Trigger_T6_TRGO; DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None; DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Disable; DAC_Init(DAC_Channel_2, &DAC_InitStructure); /* DMA1_Stream6 channel7 configuration **************************************/ + DMA_DeInit(DMA1_Stream6); DMA_InitStructure.DMA_Channel = DMA_Channel_7; DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)DAC_DHR12L2_ADDRESS; - DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)dac_buf; + DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)dac2_buf; DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; DMA_InitStructure.DMA_BufferSize = DAC_BUF_SZ; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; @@ -172,6 +226,7 @@ static void DAC_Ch2_Config(void) DMA_Init(DMA1_Stream6, &DMA_InitStructure); /* Enable DMA Half & Complete interrupts */ + DMA_ITConfig(DMA1_Stream6, DMA_IT_TC | DMA_IT_HT, ENABLE); /* Enable the DMA Stream IRQ Channel */ @@ -183,12 +238,15 @@ static void DAC_Ch2_Config(void) NVIC_Init(&NVIC_InitStructure); /* Enable DMA1_Stream6 */ + DMA_Cmd(DMA1_Stream6, ENABLE); - /* Enable DAC Channel2 */ + /* Enable DAC Channel 2 */ + DAC_Cmd(DAC_Channel_2, ENABLE); - /* Enable DMA for DAC Channel2 */ + /* Enable DMA for DAC Channel 2 */ + DAC_DMACmd(DAC_Channel_2, ENABLE); } @@ -200,19 +258,72 @@ static void DAC_Ch2_Config(void) /******************************************************************************/ /* - This function handles DMA Stream interrupt request. + This function handles DMA1 Stream 5 interrupt request for DAC1. +*/ + +void DMA1_Stream5_IRQHandler(void) { + int i, sam; + short signed_buf[DAC_BUF_SZ/2]; + + /* Transfer half empty interrupt - refill first half */ + + if(DMA_GetITStatus(DMA1_Stream5, DMA_IT_HTIF5) != RESET) { + /* fill first half from fifo */ + + if (fifo_read(dac1_fifo, signed_buf, DAC_BUF_SZ/2) == -1) { + memset(signed_buf, 0, sizeof(short)*DAC_BUF_SZ/2); + dac_underflow++; + } + + /* convert to unsigned */ + + for(i=0; i