From: Dan White <dan@whiteaudio.com>
Date: Fri, 27 Jan 2012 04:11:30 +0000 (-0600)
Subject: WIP dev board
X-Git-Tag: calibrations~322
X-Git-Url: http://git.whiteaudio.com/gitweb/?a=commitdiff_plain;h=80d08026dc708ad90fe69859cc4e90a1b1d6e320;p=430.git

WIP dev board
---

diff --git a/sch-pcb/devboard/Makefile b/sch-pcb/devboard/Makefile
new file mode 120000
index 0000000..d0b0e8e
--- /dev/null
+++ b/sch-pcb/devboard/Makefile
@@ -0,0 +1 @@
+../Makefile
\ No newline at end of file
diff --git a/sch-pcb/devboard/atoi-1.sch b/sch-pcb/devboard/atoi-1.sch
index 7705fe2..aceed1c 100644
--- a/sch-pcb/devboard/atoi-1.sch
+++ b/sch-pcb/devboard/atoi-1.sch
@@ -6,238 +6,6 @@ refdes=U?
 T 46000 57100 5 10 1 1 0 3 1
 footprint=SEMPAC_12x12_100A.fp
 }
-C 25600 48700 1 0 0 cc430f5137-1.sym
-{
-T 29700 62700 5 10 1 1 0 3 1
-refdes=U?
-T 29700 61900 5 10 1 1 0 3 1
-footprint=QFN_48N__TI.fp
-T 29700 61500 5 10 1 1 0 3 1
-document=cc430f5137.pdf
-}
-C 60600 63100 1 0 0 resistor-3.sym
-{
-T 57200 63900 5 10 0 0 0 0 1
-device=RESISTOR
-T 60900 63700 5 10 1 1 0 0 1
-refdes=R?
-T 60900 63400 5 10 1 1 0 0 1
-value=1k
-}
-C 60600 62800 1 0 0 gnd-1.sym
-{
-T 60500 62650 5 10 1 1 0 0 1
-net=AVSS
-}
-C 56500 62700 1 0 1 resistor-3.sym
-{
-T 56200 63300 5 10 1 1 0 6 1
-refdes=R?
-T 56200 63000 5 10 1 1 0 6 1
-value=1k
-}
-C 56500 62400 1 0 1 gnd-1.sym
-{
-T 56600 62250 5 10 1 1 0 6 1
-net=AVSS
-}
-C 57400 55400 1 0 0 EMBEDDEDdac8568-1.sym
-[
-B 57700 55700 2300 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-V 57650 59300 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 57400 59300 57600 59300 1 0 0
-{
-T 57750 59300 9 10 1 1 0 1 1
-pinlabel=\_LDAC\_
-T 57600 59350 5 8 1 1 0 6 1
-pinnumber=1
-T 57600 59350 5 8 0 1 0 6 1
-pinseq=1
-T 57600 59350 9 10 0 1 0 6 1
-pintype=in
-}
-V 57650 58900 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 57400 58900 57600 58900 1 0 0
-{
-T 57750 58900 9 10 1 1 0 1 1
-pinlabel=\_SYNC\_
-T 57600 58950 5 8 1 1 0 6 1
-pinnumber=2
-T 57600 58950 5 8 0 1 0 6 1
-pinseq=2
-T 57600 58950 9 10 0 1 0 6 1
-pintype=in
-}
-P 58900 60500 58900 60200 1 0 0
-{
-T 58900 60150 9 10 1 1 90 7 1
-pinlabel=AVDD
-T 58950 60250 5 8 1 1 0 0 1
-pinnumber=3
-T 58950 60250 5 8 0 1 0 0 1
-pinseq=3
-T 58800 55450 9 10 0 1 0 6 1
-pintype=pwr
-}
-P 57400 58100 57700 58100 1 0 0
-{
-T 57750 58100 9 10 1 1 0 1 1
-pinlabel=Vout0
-T 57600 58150 5 8 1 1 0 6 1
-pinnumber=4
-T 57600 58150 5 8 0 1 0 6 1
-pinseq=4
-T 57600 58150 9 10 0 1 0 6 1
-pintype=out
-}
-P 57400 57700 57700 57700 1 0 0
-{
-T 57750 57700 9 10 1 1 0 1 1
-pinlabel=Vout2
-T 57600 57750 5 8 1 1 0 6 1
-pinnumber=5
-T 57600 57750 5 8 0 1 0 6 1
-pinseq=5
-T 57600 57750 9 10 0 1 0 6 1
-pintype=out
-}
-P 57400 57300 57700 57300 1 0 0
-{
-T 57750 57300 9 10 1 1 0 1 1
-pinlabel=Vout4
-T 57600 57350 5 8 1 1 0 6 1
-pinnumber=6
-T 57600 57350 5 8 0 1 0 6 1
-pinseq=6
-T 57600 57350 9 10 0 1 0 6 1
-pintype=out
-}
-P 57400 56900 57700 56900 1 0 0
-{
-T 57750 56900 9 10 1 1 0 1 1
-pinlabel=Vout6
-T 57600 56950 5 8 1 1 0 6 1
-pinnumber=7
-T 57600 56950 5 8 0 1 0 6 1
-pinseq=7
-T 57600 56950 9 10 0 1 0 6 1
-pintype=out
-}
-P 57400 56100 57700 56100 1 0 0
-{
-T 57750 56100 9 10 1 1 0 1 1
-pinlabel=Vref
-T 57600 56150 5 8 1 1 0 6 1
-pinnumber=8
-T 57600 56150 5 8 0 1 0 6 1
-pinseq=8
-T 57600 56150 9 10 0 1 0 6 1
-pintype=out
-}
-V 60050 56100 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-P 60300 56100 60100 56100 1 0 0
-{
-T 59950 56100 9 10 1 1 0 7 1
-pinlabel=\_CLR\_
-T 60100 56150 5 8 1 1 0 0 1
-pinnumber=9
-T 60100 56150 5 8 0 1 0 0 1
-pinseq=9
-T 59900 56150 9 10 0 1 0 6 1
-pintype=in
-}
-P 60300 56900 60000 56900 1 0 0
-{
-T 59950 56900 9 10 1 1 0 7 1
-pinlabel=Vout7
-T 60100 56950 5 8 1 1 0 0 1
-pinnumber=10
-T 60100 56950 5 8 0 1 0 0 1
-pinseq=10
-T 59900 56950 9 10 0 1 0 6 1
-pintype=out
-}
-P 60300 57300 60000 57300 1 0 0
-{
-T 59950 57300 9 10 1 1 0 7 1
-pinlabel=Vout5
-T 60100 57350 5 8 1 1 0 0 1
-pinnumber=11
-T 60100 57350 5 8 0 1 0 0 1
-pinseq=11
-T 59900 57350 9 10 0 1 0 6 1
-pintype=out
-}
-P 60300 57700 60000 57700 1 0 0
-{
-T 59950 57700 9 10 1 1 0 7 1
-pinlabel=Vout3
-T 60100 57750 5 8 1 1 0 0 1
-pinnumber=12
-T 60100 57750 5 8 0 1 0 0 1
-pinseq=12
-T 59900 57750 9 10 0 1 0 6 1
-pintype=out
-}
-P 60300 58100 60000 58100 1 0 0
-{
-T 59950 58100 9 10 1 1 0 7 1
-pinlabel=Vout1
-T 60100 58150 5 8 1 1 0 0 1
-pinnumber=13
-T 60100 58150 5 8 0 1 0 0 1
-pinseq=13
-T 59900 58150 9 10 0 1 0 6 1
-pintype=out
-}
-P 58900 55400 58900 55700 1 0 0
-{
-T 58900 55750 9 10 1 1 90 1 1
-pinlabel=GND
-T 58950 55650 5 8 1 1 0 2 1
-pinnumber=14
-T 58950 55650 5 8 0 1 0 2 1
-pinseq=14
-T 58800 55850 9 10 0 1 0 6 1
-pintype=pwr
-}
-P 60300 58900 60000 58900 1 0 0
-{
-T 59950 58900 9 10 1 1 0 7 1
-pinlabel=DIN
-T 60100 58950 5 8 1 1 0 0 1
-pinnumber=15
-T 60100 58950 5 8 0 1 0 0 1
-pinseq=15
-T 59900 58950 9 10 0 1 0 6 1
-pintype=in
-}
-P 60300 59300 60000 59300 1 0 0
-{
-T 59950 59300 9 10 1 1 0 7 1
-pinlabel=SCLK
-T 60100 59350 5 8 1 1 0 0 1
-pinnumber=16
-T 60100 59350 5 8 0 1 0 0 1
-pinseq=16
-T 59900 59350 9 10 0 1 0 6 1
-pintype=in
-}
-T 60000 60300 9 10 0 0 0 0 1
-document=dac8586.pdf
-T 60000 60500 9 10 0 0 0 0 1
-footprint=TSSOP_16N__TI
-T 58900 59100 9 10 0 1 0 3 1
-refdes=U?
-T 58900 58700 9 10 1 1 0 3 1
-DAC8568
-]
-{
-T 59900 53400 5 10 0 0 0 0 1
-footprint=TSSOP_16N__TI
-T 58900 59100 5 10 1 1 0 3 1
-refdes=U?
-}
 C 56800 48400 1 0 0 ads8201-1.sym
 {
 T 59700 53200 5 10 0 0 0 0 1
@@ -245,178 +13,6 @@ footprint=QFN_24N__TI
 T 58400 51600 5 10 1 1 0 3 1
 refdes=U?
 }
-C 57600 60700 1 0 0 ad5242-1.sym
-{
-T 61500 60500 5 10 0 0 0 0 1
-footprint=QFN_24N__ADI
-T 58700 64800 5 10 1 1 0 3 1
-refdes=U?
-}
-C 55800 62700 1 0 1 resistor-3.sym
-{
-T 55500 63300 5 10 1 1 0 6 1
-refdes=R?
-T 55500 63000 5 10 1 1 0 6 1
-value=1k
-}
-C 61300 63100 1 0 0 resistor-3.sym
-{
-T 61600 63700 5 10 1 1 0 0 1
-refdes=R?
-T 61600 63400 5 10 1 1 0 0 1
-value=1k
-}
-C 51400 60200 1 0 0 gnd-1.sym
-{
-T 51600 60350 5 10 1 1 0 0 1
-net=AVSS
-}
-N 51500 60500 50800 60500 4
-N 50800 60500 50800 60100 4
-N 56400 64200 57600 64200 4
-{
-T 57100 64200 5 10 1 1 0 0 1
-netname=biasR
-}
-N 52300 57300 53400 57300 4
-{
-T 52500 57300 5 10 1 1 0 0 1
-netname=biasR
-}
-N 59700 64600 61200 64600 4
-{
-T 59800 64600 5 10 1 1 0 0 1
-netname=buf_biasR
-}
-C 59900 64800 1 0 0 pad-r.sym
-{
-T 60200 65200 5 10 1 1 0 0 1
-refdes=TP?
-}
-C 56200 64400 1 0 0 pad-l.sym
-{
-T 56700 64800 5 10 1 1 0 0 1
-refdes=TP?
-}
-N 57400 64600 57600 64600 4
-N 59900 65000 59700 65000 4
-N 60700 64000 60700 64200 4
-N 56400 63600 56400 63800 4
-N 55700 58100 55700 62700 4
-N 55700 58100 57400 58100 4
-N 61400 58100 60300 58100 4
-N 57400 57700 56500 57700 4
-{
-T 56700 57700 5 10 1 1 0 0 1
-netname=INA
-}
-N 60300 57700 61300 57700 4
-{
-T 60700 57700 5 10 1 1 0 0 1
-netname=INB
-}
-N 52300 55700 53400 55700 4
-{
-T 52500 55700 5 10 1 1 0 0 1
-netname=INA
-}
-N 52300 55300 53400 55300 4
-{
-T 52500 55300 5 10 1 1 0 0 1
-netname=INB
-}
-N 52300 54900 53400 54900 4
-{
-T 52500 54900 5 10 1 1 0 0 1
-netname=CMI
-}
-C 53000 63600 1 0 1 opamp-dual-1.sym
-{
-T 53900 64300 5 10 0 0 0 6 1
-device=DUAL_OPAMP
-T 52900 64400 5 10 1 1 0 6 1
-refdes=U?
-T 52300 64300 5 10 1 0 0 6 1
-slot=2
-T 53400 62900 5 10 0 1 0 6 1
-footprint=SOT23__Maxim
-T 53900 64500 5 10 0 0 0 6 1
-symversion=0.2
-T 52300 63700 5 10 1 1 0 6 1
-value=MAX9912
-T 53400 62700 5 10 0 0 0 6 1
-slot=2
-}
-C 55800 64200 1 0 1 opamp-dual-1.sym
-{
-T 53700 65900 5 10 0 0 0 6 1
-device=DUAL_OPAMP
-T 55700 65000 5 10 1 1 0 6 1
-refdes=U?
-T 55100 64900 5 10 1 0 0 6 1
-slot=1
-T 53200 64500 5 10 0 1 0 6 1
-footprint=SOT23__Maxim
-T 53700 66100 5 10 0 0 0 6 1
-symversion=0.2
-T 55100 64300 5 10 1 1 0 6 1
-value=MAX9912
-}
-N 53400 64600 54800 64600 4
-{
-T 53500 64700 5 10 1 1 0 0 1
-netname=ADC0_IN0
-}
-N 54500 64600 54500 65400 4
-N 54500 65400 55800 65400 4
-N 55800 65400 55800 64800 4
-N 53000 64200 53000 64800 4
-N 51700 64800 53000 64800 4
-N 51700 64000 51700 64800 4
-N 50700 64000 52000 64000 4
-{
-T 50800 64100 5 10 1 1 0 0 1
-netname=ADC0_IN1
-}
-N 53000 63800 57600 63800 4
-N 55700 63800 55700 63600 4
-N 59700 64200 64600 64200 4
-N 61400 64000 61400 64200 4
-C 64600 64000 1 0 0 opamp-dual-1.sym
-{
-T 64700 64800 5 10 1 1 0 0 1
-refdes=U?
-T 65300 64700 5 10 1 0 0 0 1
-slot=2
-T 65300 64100 5 10 1 1 0 0 1
-value=MAX9912
-}
-C 61800 64600 1 0 0 opamp-dual-1.sym
-{
-T 61900 65400 5 10 1 1 0 0 1
-refdes=U?
-T 62500 65300 5 10 1 0 0 0 1
-slot=1
-T 62500 64700 5 10 1 1 0 0 1
-value=MAX9912
-}
-N 62800 65000 64200 65000 4
-{
-T 63300 65100 5 10 1 1 0 0 1
-netname=ADC0_IN2
-}
-N 63100 65000 63100 65800 4
-N 63100 65800 61800 65800 4
-N 61800 65800 61800 65200 4
-N 64600 64600 64600 65200 4
-N 65900 65200 64600 65200 4
-N 65900 64400 65900 65200 4
-N 65600 64400 67000 64400 4
-{
-T 66100 64500 5 10 1 1 0 0 1
-netname=ADC0_IN3
-}
-N 61400 63100 61400 58100 4
 N 58600 53200 58600 54200 4
 {
 T 58600 53300 5 10 1 1 90 0 1
@@ -437,67 +33,6 @@ N 57400 53200 57400 54200 4
 T 57400 53300 5 10 1 1 90 0 1
 netname=ADC0_IN3
 }
-N 52300 56100 53400 56100 4
-{
-T 52500 56100 5 10 1 1 0 0 1
-netname=buf_biasR
-}
-C 57300 62100 1 0 1 resistor-3.sym
-{
-T 57000 62700 5 10 1 1 0 6 1
-refdes=R?
-T 57000 62400 5 10 1 1 0 6 1
-value=1k
-}
-N 57600 63000 57200 63000 4
-N 57200 62100 57600 62100 4
-N 57600 62100 57600 62600 4
-C 59900 60900 1 0 0 gnd-1.sym
-{
-T 59800 60750 5 10 1 1 0 0 1
-net=AVSS
-}
-N 59700 63000 60000 63000 4
-N 60000 61200 60000 63000 4
-N 60000 62600 59700 62600 4
-C 57200 63200 1 0 0 generic-power.sym
-{
-T 57400 63450 5 10 1 1 0 3 1
-net=VddPA:1
-}
-N 57400 63200 57400 63000 4
-N 59700 61800 60000 61800 4
-N 59700 61400 60000 61400 4
-C 58700 60500 1 0 0 generic-power.sym
-{
-T 58900 60750 5 10 1 1 0 3 1
-net=VddPA:1
-}
-C 58800 55100 1 0 0 gnd-1.sym
-{
-T 58700 54950 5 10 1 1 0 0 1
-net=AVSS
-}
-N 52300 54500 53400 54500 4
-{
-T 52500 54500 5 10 1 1 0 0 1
-netname=ADC0_IN4
-}
-N 52300 54100 53400 54100 4
-{
-T 52500 54100 5 10 1 1 0 0 1
-netname=ADC0_IN5
-}
-N 52300 52900 53400 52900 4
-{
-T 52500 52900 5 10 1 1 0 0 1
-netname=ADC0_IN6
-}
-N 52300 52500 53400 52500 4
-{
-T 52500 52500 5 10 1 1 0 0 1
-netname=ADC0_IN7
-}
 N 55800 51800 56800 51800 4
 {
 T 55900 51800 5 10 1 1 0 0 1
@@ -518,47 +53,3 @@ N 55800 50600 56800 50600 4
 T 55900 50600 5 10 1 1 0 0 1
 netname=ADC0_IN7
 }
-C 52300 64400 1 0 0 generic-power.sym
-{
-T 52500 64650 5 10 1 1 0 3 1
-net=VddPA:1
-}
-C 52600 63300 1 0 1 gnd-1.sym
-{
-T 52500 63450 5 10 1 1 0 6 1
-net=AVSS
-}
-C 55100 65000 1 0 0 generic-power.sym
-{
-T 55300 65250 5 10 1 1 0 3 1
-net=VddPA:1
-}
-C 55400 63900 1 0 1 gnd-1.sym
-{
-T 55300 64050 5 10 1 1 0 6 1
-net=AVSS
-}
-N 55800 64400 56400 64400 4
-N 56400 64400 56400 64200 4
-C 62100 65400 1 0 0 generic-power.sym
-{
-T 62300 65650 5 10 1 1 0 3 1
-net=VddPA:1
-}
-C 62400 64300 1 0 1 gnd-1.sym
-{
-T 62300 64450 5 10 1 1 0 6 1
-net=AVSS
-}
-C 64900 64800 1 0 0 generic-power.sym
-{
-T 65100 65050 5 10 1 1 0 3 1
-net=VddPA:1
-}
-C 65200 63700 1 0 1 gnd-1.sym
-{
-T 65100 63850 5 10 1 1 0 6 1
-net=AVSS
-}
-N 61800 64800 61200 64800 4
-N 61200 64800 61200 64600 4
diff --git a/sch-pcb/devboard/atoi-2.sch b/sch-pcb/devboard/atoi-2.sch
new file mode 100644
index 0000000..36b5be1
--- /dev/null
+++ b/sch-pcb/devboard/atoi-2.sch
@@ -0,0 +1,523 @@
+v 20111231 2
+C 40000 40000 0 0 0 title-wa-85x110.sym
+{
+T 49900 40600 5 10 1 1 0 0 1
+date=---
+T 53700 40600 5 10 1 1 0 0 1
+rev=---
+T 53700 40300 5 10 1 1 0 0 1
+auth=DJW
+T 49900 40900 5 8 1 1 0 0 1
+fname=$Id: $
+T 49900 41300 5 14 1 1 0 0 1
+title=TITLE
+T 50600 40300 5 10 1 1 0 6 1
+pagenum=1
+T 52100 40300 5 10 1 1 0 6 1
+pageof=1
+}
+C 51400 42800 1 0 0 wb430-2.sym
+{
+T 53400 46100 5 10 1 1 0 3 1
+refdes=AtoI0
+}
+N 50300 46700 51400 46700 4
+{
+T 50500 46700 5 10 1 1 0 0 1
+netname=biasR
+}
+N 50300 44300 51400 44300 4
+{
+T 50500 44300 5 10 1 1 0 0 1
+netname=INA
+}
+N 50300 43900 51400 43900 4
+{
+T 50500 43900 5 10 1 1 0 0 1
+netname=INB
+}
+N 50300 43500 51400 43500 4
+{
+T 50500 43500 5 10 1 1 0 0 1
+netname=CMI
+}
+N 50300 45100 51400 45100 4
+{
+T 50500 45100 5 10 1 1 0 0 1
+netname=buf_biasR
+}
+N 55400 47500 56500 47500 4
+{
+T 55600 47500 5 10 1 1 0 0 1
+netname=ADC0_IN4
+}
+N 55400 47100 56500 47100 4
+{
+T 55600 47100 5 10 1 1 0 0 1
+netname=ADC0_IN5
+}
+N 55400 45100 56500 45100 4
+{
+T 55600 45100 5 10 1 1 0 0 1
+netname=ADC0_IN6
+}
+N 55400 44700 56500 44700 4
+{
+T 55600 44700 5 10 1 1 0 0 1
+netname=ADC0_IN7
+}
+C 48500 48700 1 0 0 resistor-3.sym
+{
+T 45100 49500 5 10 0 0 0 0 1
+device=RESISTOR
+T 48800 49300 5 10 1 1 0 0 1
+refdes=R?
+T 48800 49000 5 10 1 1 0 0 1
+value=1k
+}
+C 48500 48400 1 0 0 gnd-1.sym
+{
+T 48400 48250 5 10 1 1 0 0 1
+net=AVSS
+}
+C 44400 48300 1 0 1 resistor-3.sym
+{
+T 44100 48900 5 10 1 1 0 6 1
+refdes=R?
+T 44100 48600 5 10 1 1 0 6 1
+value=1k
+}
+C 44400 48000 1 0 1 gnd-1.sym
+{
+T 44500 47850 5 10 1 1 0 6 1
+net=AVSS
+}
+C 41600 41400 1 0 0 EMBEDDEDdac8568-1.sym
+[
+B 41900 41700 2300 4500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+V 41850 45300 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 41600 45300 41800 45300 1 0 0
+{
+T 41950 45300 9 10 1 1 0 1 1
+pinlabel=\_LDAC\_
+T 41800 45350 5 8 1 1 0 6 1
+pinnumber=1
+T 41800 45350 5 8 0 1 0 6 1
+pinseq=1
+T 41800 45350 9 10 0 1 0 6 1
+pintype=in
+}
+V 41850 44900 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 41600 44900 41800 44900 1 0 0
+{
+T 41950 44900 9 10 1 1 0 1 1
+pinlabel=\_SYNC\_
+T 41800 44950 5 8 1 1 0 6 1
+pinnumber=2
+T 41800 44950 5 8 0 1 0 6 1
+pinseq=2
+T 41800 44950 9 10 0 1 0 6 1
+pintype=in
+}
+P 43100 46500 43100 46200 1 0 0
+{
+T 43100 46150 9 10 1 1 90 7 1
+pinlabel=AVDD
+T 43150 46250 5 8 1 1 0 0 1
+pinnumber=3
+T 43150 46250 5 8 0 1 0 0 1
+pinseq=3
+T 43000 41450 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 41600 44100 41900 44100 1 0 0
+{
+T 41950 44100 9 10 1 1 0 1 1
+pinlabel=Vout0
+T 41800 44150 5 8 1 1 0 6 1
+pinnumber=4
+T 41800 44150 5 8 0 1 0 6 1
+pinseq=4
+T 41800 44150 9 10 0 1 0 6 1
+pintype=out
+}
+P 41600 43700 41900 43700 1 0 0
+{
+T 41950 43700 9 10 1 1 0 1 1
+pinlabel=Vout2
+T 41800 43750 5 8 1 1 0 6 1
+pinnumber=5
+T 41800 43750 5 8 0 1 0 6 1
+pinseq=5
+T 41800 43750 9 10 0 1 0 6 1
+pintype=out
+}
+P 41600 43300 41900 43300 1 0 0
+{
+T 41950 43300 9 10 1 1 0 1 1
+pinlabel=Vout4
+T 41800 43350 5 8 1 1 0 6 1
+pinnumber=6
+T 41800 43350 5 8 0 1 0 6 1
+pinseq=6
+T 41800 43350 9 10 0 1 0 6 1
+pintype=out
+}
+P 41600 42900 41900 42900 1 0 0
+{
+T 41950 42900 9 10 1 1 0 1 1
+pinlabel=Vout6
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+pinnumber=7
+T 41800 42950 5 8 0 1 0 6 1
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+pintype=out
+}
+P 41600 42100 41900 42100 1 0 0
+{
+T 41950 42100 9 10 1 1 0 1 1
+pinlabel=Vref
+T 41800 42150 5 8 1 1 0 6 1
+pinnumber=8
+T 41800 42150 5 8 0 1 0 6 1
+pinseq=8
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+pintype=out
+}
+V 44250 42100 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 44500 42100 44300 42100 1 0 0
+{
+T 44150 42100 9 10 1 1 0 7 1
+pinlabel=\_CLR\_
+T 44300 42150 5 8 1 1 0 0 1
+pinnumber=9
+T 44300 42150 5 8 0 1 0 0 1
+pinseq=9
+T 44100 42150 9 10 0 1 0 6 1
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diff --git a/sch-pcb/devboard/atoi-3.sch b/sch-pcb/devboard/atoi-3.sch
new file mode 100644
index 0000000..53b5046
--- /dev/null
+++ b/sch-pcb/devboard/atoi-3.sch
@@ -0,0 +1,41 @@
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diff --git a/sch-pcb/devboard/atoi-4.sch b/sch-pcb/devboard/atoi-4.sch
new file mode 100644
index 0000000..7fc370c
--- /dev/null
+++ b/sch-pcb/devboard/atoi-4.sch
@@ -0,0 +1,23 @@
+v 20111231 2
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