From: drowe67 <drowe67@01035d8c-6547-0410-b346-abe4f91aad63>
Date: Mon, 28 Dec 2015 08:04:13 +0000 (+0000)
Subject: updated power budget calcs
X-Git-Url: http://git.whiteaudio.com/gitweb/?a=commitdiff_plain;h=98c9b5bedd5ed359e7bbcc44d95bfcf2365f2986;p=freetel-svn-tracking.git

updated power budget calcs

git-svn-id: https://svn.code.sf.net/p/freetel/code@2578 01035d8c-6547-0410-b346-abe4f91aad63
---

diff --git a/sm2000/doc/sm202 Task List.txt b/sm2000/doc/sm202 Task List.txt
index aa8824ac..e5cf499f 100644
--- a/sm2000/doc/sm202 Task List.txt	
+++ b/sm2000/doc/sm202 Task List.txt	
@@ -190,10 +190,11 @@ Task List
         + if not good enough we'll need an external ADC
         + test against two tone, MDS and ACR
         + Result: met 135dBm spec on prototype so OK
-    [ ] Power dissipation of active devices and resistors
+    [X] Power dissipation of active devices and resistors
         + easy to exceed limits in SM resistors and transistors
         + RF drivers draw lots of current
         + mitigation: power spereadhseet in doc section
+        + looks good, see also email to Rick 28/12/15 sub: "sm205 powr budget"
     [X] IF termination of 1st mixer
         + how to test if this is OK -> Sweep with R/L bridge
     [X] do we need a way to bypass the LNA?
@@ -258,6 +259,9 @@ Task List
     [ ] how to connect SCA/SCL on clock chips to uC?
         + is there a separate enable?
     [ ] LEDs for control signals/rails
+    [ ] Add a Av=2 op-amp to take 3v3 DAC max from uC to 5V
+        max for Vgg driving PA final Q14.  Will need to be powered by 5V rail.
+        This is a preacuation in case we need > 3V for some FETs
 
 [ ] Rev A PCB Layout
     [ ] footprints for all devices
diff --git a/sm2000/doc/sm205_power_budget.xls b/sm2000/doc/sm205_power_budget.xls
index f4bcf0ba..e9d6bb89 100644
Binary files a/sm2000/doc/sm205_power_budget.xls and b/sm2000/doc/sm205_power_budget.xls differ