From: Dan White Date: Sun, 21 Apr 2013 02:18:28 +0000 (-0500) Subject: start flash loader code X-Git-Tag: bootrom-initial-submission~22^2~7 X-Git-Url: http://git.whiteaudio.com/gitweb/?a=commitdiff_plain;h=d14f01b5eab461ade6004225acad81127ed9a929;p=430.git start flash loader code --- diff --git a/msp4th/main.c b/msp4th/main.c index cc4bc1a..dfad9bc 100644 --- a/msp4th/main.c +++ b/msp4th/main.c @@ -4,6 +4,7 @@ #include "ns430-atoi.h" #include "ns430-uart.h" +#include "ns430-spi.h" #include "msp4th.h" @@ -60,10 +61,71 @@ int main(void){ int16_t tmp; + register int16_t data asm("r5"); + register int16_t *addr asm("r7"); dint(); + PAOUT = 0x0001; + PAOEN = 0x0001; + PAPER = 0x000e; + + + // check pin state + if ((PADSR & (1 << 7)) == 0) { + // msp4th interp + } else { + // load flash image into RAM + + // setup SPI mode 3, 8b transfers + SPI0_CR = (SPI_CPHA | SPI_CPOL | SPI_EN); + + // /CS, pin[0] low + PAOUT &= ~(1 << 0); + + // release flash from deep sleep + SPI0_TDR = 0xab00; + while ((SPI0_SR & TDRE) == 0) { /* wait */ } + + // change to 16-bit transfers + SPI0_CR = (SPI_DL | SPI_CPHA | SPI_CPOL | SPI_EN); + + // /CS high + PAOUT |= (1 << 0); + + // /CS low + PAOUT &= ~(1 << 0); + // send flash command + // 0x03 - read data bytes + // 0x00 - address MSB + SPI0_TDR = 0x0300; + SPI0_TDR = RAMStart; + while ((SPI0_SR & TDRE) == 0) { /* wait */ } + + SPI0_TDR = 0x0000; + while ((SPI0_SR & TDRE) == 0) { /* wait */ } + + SPI0_TDR = 0x0000; + while ((SPI0_SR & TDRE) == 0) { /* wait */ } + + // clear status + SPI0_SR = 0; + + for (addr=RAMStart; addr <= RAMStart+RAMSize-2; addr++) { + while ((SPI0_SR & TDRE) == 0) { /* wait */ } + + // store data + data = SPI0_RDR; + // keep receiving (by sending zeros) + SPI0_TDR = 0x0000; + + addr = data; + } + } + + + // chip setup for UART0 use PAPER = 0x0030; PAOUT = 0x0000;