From 6c19a20653da4d967f6267e52ab6c1389a2d598d Mon Sep 17 00:00:00 2001 From: drowe67 Date: Tue, 24 Feb 2015 04:49:56 +0000 Subject: [PATCH] tweaks to tuner to get ISR freq right git-svn-id: https://svn.code.sf.net/p/freetel/code@2046 01035d8c-6547-0410-b346-abe4f91aad63 --- codec2-dev/stm32/src/stm32f4_adc_tuner.c | 11 +++++++---- codec2-dev/stm32/src/tuner_ut.c | 2 ++ 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/codec2-dev/stm32/src/stm32f4_adc_tuner.c b/codec2-dev/stm32/src/stm32f4_adc_tuner.c index 95505f7f..b8e3b2a6 100644 --- a/codec2-dev/stm32/src/stm32f4_adc_tuner.c +++ b/codec2-dev/stm32/src/stm32f4_adc_tuner.c @@ -86,15 +86,18 @@ static void tim2_config(void) APB1 prescaler is different from 1 (see system_stm32f4xx.c and Fig 13 clock tree figure in DM0031020.pdf). - Sample rate Fs = 2*PCLK1/TIM_ClockDivision - = (HCLK/2)/TIM_ClockDivision + Sample rate Fs = 2*PCLK1/)TIM_ClockDivision+1) + = (HCLK/2)/(TIM_ClockDivision+1) + Note from David: The +1 was discovered empirically, still not sure + if it's right. + ----------------------------------------------------------- */ /* Time base configuration */ TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); - TIM_TimeBaseStructure.TIM_Period = 42; + TIM_TimeBaseStructure.TIM_Period = 41; TIM_TimeBaseStructure.TIM_Prescaler = 0; TIM_TimeBaseStructure.TIM_ClockDivision = 0; TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; @@ -110,7 +113,7 @@ static void tim2_config(void) } -void adc_configure(){ +void adc_configure() { ADC_InitTypeDef ADC_init_structure; GPIO_InitTypeDef GPIO_initStructre; DMA_InitTypeDef DMA_InitStructure; diff --git a/codec2-dev/stm32/src/tuner_ut.c b/codec2-dev/stm32/src/tuner_ut.c index 153eae45..788e5cfd 100644 --- a/codec2-dev/stm32/src/tuner_ut.c +++ b/codec2-dev/stm32/src/tuner_ut.c @@ -83,5 +83,7 @@ int main(void) { printf("finished! %d\n", adc_overflow1); fclose(ftuner); + + while(1); /* keep ISR running */ } -- 2.25.1