From 75b733eca8bf52d0d5d8ada587dde88e845e215b Mon Sep 17 00:00:00 2001
From: Dan White <dan@whiteaudio.com>
Date: Mon, 16 Jan 2012 13:58:11 -0600
Subject: [PATCH] Add symbol sources

---
 test-pcb/sym/ad5242-1.djboxsym     |  40 +++++++++
 test-pcb/sym/ads8201-1.djboxsym    |  45 ++++++++++
 test-pcb/sym/cc430f5137-1.djboxsym |  68 +++++++++++++++
 test-pcb/sym/title-phd-85x110.sym  | 128 +++++++++++++++++++++++++++++
 test-pcb/sym/wb430-1.djboxsym      | 117 ++++++++++++++++++++++++++
 5 files changed, 398 insertions(+)
 create mode 100644 test-pcb/sym/ad5242-1.djboxsym
 create mode 100644 test-pcb/sym/ads8201-1.djboxsym
 create mode 100644 test-pcb/sym/cc430f5137-1.djboxsym
 create mode 100644 test-pcb/sym/title-phd-85x110.sym
 create mode 100644 test-pcb/sym/wb430-1.djboxsym

diff --git a/test-pcb/sym/ad5242-1.djboxsym b/test-pcb/sym/ad5242-1.djboxsym
new file mode 100644
index 0000000..d454ce7
--- /dev/null
+++ b/test-pcb/sym/ad5242-1.djboxsym
@@ -0,0 +1,40 @@
+
+--vmode
+
+[labels]
+refdes=U?
+AD5242
+! footprint=QFN_24N__ADI
+! document=ad5242.pdf
+
+[left]
+2		A1
+3		W1
+4		B1
+
+16		A2
+15		W2
+14		B2
+
+6	!i	\_SHDN\_
+
+7	i	SCL
+8	io	SDA
+
+9	i	AD0
+10	i	AD1
+
+[right]
+1	o	O1
+.skip 1200
+13	o	O2
+
+[top]
+5	p	VDD
+
+
+[bottom]
+11	p	DGND
+12	p	VSS
+
+# vim:softtabstop=0 noexpandtab ft=sh
diff --git a/test-pcb/sym/ads8201-1.djboxsym b/test-pcb/sym/ads8201-1.djboxsym
new file mode 100644
index 0000000..1d8904c
--- /dev/null
+++ b/test-pcb/sym/ads8201-1.djboxsym
@@ -0,0 +1,45 @@
+
+--vmode
+
+[labels]
+refdes=U?
+ADS8201
+! footprint=QFN_24N__TI
+! document=ads8201.pdf
+
+[left]
+21	i	IN0
+22	i	IN1
+23	i	IN2
+24	i	IN3
+1	i	IN4
+2	i	IN5
+3	i	IN6
+4	i	IN7
+5	i!	\_RST\_
+7	i	SCLK
+8	i!	\_CS\_
+9	i	SDI
+10	o	SDO
+12	i!	\_CONVST\_
+
+
+[right]
+6	o	BUSY/INT
+15	p	REF
+16	p	REFGND
+19	o	PGAOUT
+18	i	ADCIN
+20	i	PGAREF
+
+
+[top]
+13	p	VDDIO
+14	p	VDDA
+
+
+[bottom]
+11	p	DGND
+17	p	GNDA
+
+# vim:softtabstop=0 noexpandtab ft=sh
diff --git a/test-pcb/sym/cc430f5137-1.djboxsym b/test-pcb/sym/cc430f5137-1.djboxsym
new file mode 100644
index 0000000..bf15594
--- /dev/null
+++ b/test-pcb/sym/cc430f5137-1.djboxsym
@@ -0,0 +1,68 @@
+
+--vmode
+
+[labels]
+refdes=U?
+CC430F5137
+footprint=QFN_48N__TI.fp
+document=cc430f5137.pdf
+
+
+[left]
+1	io	P2.2/TA1CCR1A/CB2/A2
+2	io	P2.1/TA1CCR0A/CB1/A1
+3	io	P2.0/CBOUT1/TA1CLK/CB0/A0
+4	io	P1.7/UCA0CLK/UCB0STE
+5	io	P1.6/UCA0TXD/UCA0MOSI
+6	io	P1.5/UCA0RXD/UCA0MISO
+9	io	P1.4/UCB0CLK/UCA0STE
+10	io	P1.3/UCB0MOSI/UCB0SDA
+11	io	P1.2/UCB0MISO/UCB0SCL
+12	io	P1.1/RFGDO2
+13	io	P1.0/RFGDO0
+14	io	P3.7/SMCLK
+15	io	P3.6/RFGDO1
+16	io	P3.5/TA0CCR4A
+17	io	P3.4/TA0CCR3A
+18	io	P3.3/TA0CCR2A
+19	io	P3.2/TA0CCR1A
+20	io	P3.1/TA0CCR0A
+21	io	P3.0/CBOUT0/TA0CLK
+23	io	P2.7/ADC12CLK/DMAE0
+24	io	P2.6/ACLK
+35	io	PJ.0/TDO
+36	io	PJ.1/TDI/TCLK
+37	io	PJ.2/TMS
+38	io	PJ.3/TCK
+39	i	TEST/SBWTCK
+40	io	\_RST\_/NMI/SBWTDIO
+42	p	AVSS
+43	io	P5.1/XOUT
+44	io	P5.0/Xi
+45	p	AVCC
+46	io	P2.5/SVMOUT/CB5/A5/VREF+/VeREF+
+47	io	P2.4/RTCCLK/CB4/A4/VREF-/VeREF-
+48	io	P2.3/TA1CCR2A/CB3/A3
+
+[top]
+7	p	VCORE
+8	p	DVCC
+22	p	DVCC
+41	p	DVCC
+
+[bottom]
+49	p	VSS_EP
+
+[right]
+25	i	RF_Xi
+26	o	RF_XOUT
+27	p	AVCC_RF
+28	p	AVCC_RF
+29	io	RF_P
+30	io	RF_N
+31	p	AVCC_RF
+32	p	AVCC_RF
+33		RBIAS
+34		GUARD
+
+# vim:softtabstop=0 noexpandtab ft=sh
diff --git a/test-pcb/sym/title-phd-85x110.sym b/test-pcb/sym/title-phd-85x110.sym
new file mode 100644
index 0000000..40879f4
--- /dev/null
+++ b/test-pcb/sym/title-phd-85x110.sym
@@ -0,0 +1,128 @@
+v 20100214 2
+T 9900 600 9 10 1 1 0 0 1
+date=---
+T 13700 600 9 10 1 1 0 0 1
+rev=---
+T 13700 300 9 10 1 1 0 0 1
+auth=DJW
+T 9900 900 9 8 1 1 0 0 1
+fname=$Id: $
+T 9900 1300 9 14 1 1 0 0 1
+title=TITLE
+T 9300 900 15 8 1 0 0 0 1
+FILE:
+T 10600 300 9 10 1 1 0 6 1
+pagenum=1
+T 12100 300 9 10 1 1 0 6 1
+pageof=1
+T 9300 1300 15 8 1 0 0 0 1
+TITLE
+T 9300 600 15 8 1 0 0 0 1
+DATE
+B 0 0 17000 13100 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+L 12700 800 12700 200 15 0 0 0 -1 -1
+B 9200 200 7600 1400 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+L 9200 800 16800 800 15 0 0 0 -1 -1
+B 200 200 16600 12700 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+L 200 2000 0 2000 15 0 0 0 -1 -1
+L 200 4000 0 4000 15 0 0 0 -1 -1
+L 200 6000 0 6000 15 0 0 0 -1 -1
+L 200 8000 0 8000 15 0 0 0 -1 -1
+L 2000 200 2000 0 15 0 0 0 -1 -1
+L 4000 200 4000 0 15 0 0 0 -1 -1
+L 6000 200 6000 0 15 0 0 0 -1 -1
+L 8000 200 8000 0 15 0 0 0 -1 -1
+L 10000 200 10000 0 15 0 0 0 -1 -1
+L 200 10000 0 10000 15 0 0 0 -1 -1
+L 12000 200 12000 0 15 0 0 0 -1 -1
+L 14000 200 14000 0 15 0 0 0 -1 -1
+L 16000 200 16000 0 15 0 0 0 -1 -1
+L 17000 10000 16800 10000 15 0 0 0 -1 -1
+L 17000 8000 16800 8000 15 0 0 0 -1 -1
+L 17000 6000 16800 6000 15 0 0 0 -1 -1
+L 17000 4000 16800 4000 15 0 0 0 -1 -1
+L 17000 2000 16800 2000 15 0 0 0 -1 -1
+L 2000 13100 2000 12900 15 0 0 0 -1 -1
+L 4000 13100 4000 12900 15 0 0 0 -1 -1
+L 6000 13100 6000 12900 15 0 0 0 -1 -1
+L 8000 13100 8000 12900 15 0 0 0 -1 -1
+L 10000 13100 10000 12900 15 0 0 0 -1 -1
+L 12000 13100 12000 12900 15 0 0 0 -1 -1
+L 14000 13100 14000 12900 15 0 0 0 -1 -1
+L 16000 13100 16000 12900 15 0 0 0 -1 -1
+T 15100 1700 5 10 0 0 0 0 1
+graphical=1
+T 12800 600 15 8 1 0 0 0 1
+REVISION:
+T 12800 300 15 8 1 0 0 0 1
+DRAWN BY: 
+T 9300 300 15 8 1 0 0 0 1
+PAGE
+T 11000 300 15 8 1 0 0 0 1
+OF
+T 100 1000 15 8 1 0 0 4 1
+A
+T 100 3000 15 8 1 0 0 4 1
+B
+T 100 5000 15 8 1 0 0 4 1
+C
+T 100 7000 15 8 1 0 0 4 1
+D
+T 1000 100 15 8 1 0 0 4 1
+1
+T 3000 100 15 8 1 0 0 4 1
+2
+T 5000 100 15 8 1 0 0 4 1
+3
+T 7000 100 15 8 1 0 0 4 1
+4
+T 9000 100 15 8 1 0 0 4 1
+5
+T 100 9000 15 8 1 0 0 4 1
+E
+T 100 11000 15 8 1 0 0 4 1
+F
+T 11000 100 15 8 1 0 0 4 1
+6
+T 13000 100 15 8 1 0 0 4 1
+7
+T 15000 100 15 8 1 0 0 4 1
+8
+T 16500 100 15 8 1 0 0 4 1
+9
+T 16900 1000 15 8 1 0 0 4 1
+A
+T 16900 3000 15 8 1 0 0 4 1
+B
+T 16900 5000 15 8 1 0 0 4 1
+C
+T 16900 7000 15 8 1 0 0 4 1
+D
+T 16900 9000 15 8 1 0 0 4 1
+E
+T 16900 11000 15 8 1 0 0 4 1
+F
+T 1000 13000 15 8 1 0 0 4 1
+1
+T 3000 13000 15 8 1 0 0 4 1
+2
+T 5000 13000 15 8 1 0 0 4 1
+3
+T 7000 13000 15 8 1 0 0 4 1
+4
+T 9000 13000 15 8 1 0 0 4 1
+5
+T 11000 13000 15 8 1 0 0 4 1
+6
+T 13000 13000 15 8 1 0 0 4 1
+7
+T 15000 13000 15 8 1 0 0 4 1
+8
+T 16500 13000 15 8 1 0 0 4 1
+9
+L 17000 12000 16800 12000 15 0 0 0 -1 -1
+L 200 12000 0 12000 15 0 0 0 -1 -1
+T 16900 12500 15 8 1 0 0 4 1
+G
+T 100 12500 15 8 1 0 0 4 1
+G
diff --git a/test-pcb/sym/wb430-1.djboxsym b/test-pcb/sym/wb430-1.djboxsym
new file mode 100644
index 0000000..c7f0fe6
--- /dev/null
+++ b/test-pcb/sym/wb430-1.djboxsym
@@ -0,0 +1,117 @@
+--vmode
+--square
+
+[labels]
+AtoI
+refdes=U?
+footprint=SEMPAC_12x12_100A.fp
+
+[left]
+1		DOUT0_mux
+2		DOUT0_conf
+3		PA15/CS0_conf
+4		PA14/RXD1
+5		PA13/TXD1
+6		PA12/SCLK1
+7		PA11/MOSI1
+8		PA10/MISO1
+9		PA9/SCL/swap
+10		PA8/SDA
+11		PA7/CS0_mux/BSL
+12		PA6/IRQ
+13		PA5/RDX0
+14		PA4/TXD0
+15		PA3/SCLK0
+16		PA2/MOSI0
+17		PA1/MISO0
+18		PA0/CS_flash
+19	!	RST
+20		VDD
+21		VSS
+22		DVDD
+23		DVSS
+24		LFXTALI
+25		LFXTALO
+
+[bottom]
+26		HFXTALI
+27		HFXTALO
+28		DVSS
+29		DVDD
+30		VSS
+31		VDD
+32		mb
+33		mb
+34		mb
+35		mb
+36		mb
+37		mb
+38		mb
+39		mb
+40		mb
+41		mb
+42		mb
+43		mb
+44		mb
+45		mb
+46		mb
+47		mb
+48		mb
+49		mb
+50		mb
+
+[right]
+75		biasp
+74		biasccp
+73		biasR
+72		buf_biasp
+71		buf_biasccp
+70		buf_biasR
+69		INA
+68		INB
+67		CMI
+66		mux0_outA
+65		mux0_outB
+64		arb_out0
+63		arb_out1
+62		mux1_outA
+61		mux1_outB
+60		mb
+59		mb
+58		mb
+57		mb
+56		mb
+55		mb
+54		mb
+53		mb
+52		mb
+51		mb
+
+[top]
+100		INT_SPI
+99		NCO_CLK
+98	!	RESET
+97		MULT0
+96		MULT1
+95		CS1_conf
+94		CS1_mux
+93		DVDD
+92		DVSS
+91		VDD
+90		VSS
+89		VDD_digi
+88		VSS_digi
+87		ota_slow
+86		ota_slowinv
+85		ota_biasa
+84		ota_biasb
+83		ota_biasccp
+82		ota_biasccn
+81		ota_ina
+80		ota_inb
+79		ota_cmi
+78		ota_out
+77		AVDD
+76		AVSS
+
+# vim:softtabstop=0 noexpandtab ft=sh
-- 
2.25.1