From a4c00d96c7ccfefa804807278dfefaa16d88796f Mon Sep 17 00:00:00 2001
From: Dan White <dan@whiteaudio.com>
Date: Mon, 16 Jan 2012 13:58:46 -0600
Subject: [PATCH] Version generated symbols also

---
 test-pcb/sym/ad5242-1.sym     |  187 ++++++
 test-pcb/sym/ads8201-1.sym    |  277 ++++++++
 test-pcb/sym/cc430f5137-1.sym |  549 ++++++++++++++++
 test-pcb/sym/wb430-1.sym      | 1109 +++++++++++++++++++++++++++++++++
 4 files changed, 2122 insertions(+)
 create mode 100644 test-pcb/sym/ad5242-1.sym
 create mode 100644 test-pcb/sym/ads8201-1.sym
 create mode 100644 test-pcb/sym/cc430f5137-1.sym
 create mode 100644 test-pcb/sym/wb430-1.sym

diff --git a/test-pcb/sym/ad5242-1.sym b/test-pcb/sym/ad5242-1.sym
new file mode 100644
index 0000000..8a383c8
--- /dev/null
+++ b/test-pcb/sym/ad5242-1.sym
@@ -0,0 +1,187 @@
+v 20060123 1
+B 300 300 1500 6900 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 1800 7300 9 10 0 0 0 0 1
+document=ad5242.pdf
+T 1800 7500 9 10 0 0 0 0 1
+footprint=QFN_24N__ADI
+T 1100 6200 9 10 1 1 0 3 1
+refdes=U?
+T 1100 5800 9 10 1 1 0 3 1
+AD5242
+P 2100 6400 1800 6400 1 0 0
+{
+T 1750 6400 9 10 1 1 0 7 1
+pinlabel=O1
+T 1900 6450 5 8 1 1 0 0 1
+pinnumber=1
+T 1900 6450 5 8 0 1 0 0 1
+pinseq=1
+T 1700 6450 9 10 0 1 0 6 1
+pintype=out
+}
+P 0 6400 300 6400 1 0 0
+{
+T 350 6400 9 10 1 1 0 1 1
+pinlabel=A1
+T 200 6450 5 8 1 1 0 6 1
+pinnumber=2
+T 200 6450 5 8 0 1 0 6 1
+pinseq=2
+T 200 6450 9 10 0 1 0 6 1
+pintype=pas
+}
+P 0 6000 300 6000 1 0 0
+{
+T 350 6000 9 10 1 1 0 1 1
+pinlabel=W1
+T 200 6050 5 8 1 1 0 6 1
+pinnumber=3
+T 200 6050 5 8 0 1 0 6 1
+pinseq=3
+T 200 6050 9 10 0 1 0 6 1
+pintype=pas
+}
+P 0 5600 300 5600 1 0 0
+{
+T 350 5600 9 10 1 1 0 1 1
+pinlabel=B1
+T 200 5650 5 8 1 1 0 6 1
+pinnumber=4
+T 200 5650 5 8 0 1 0 6 1
+pinseq=4
+T 200 5650 9 10 0 1 0 6 1
+pintype=pas
+}
+P 1100 7500 1100 7200 1 0 0
+{
+T 1100 7150 9 10 1 1 90 7 1
+pinlabel=VDD
+T 1150 7250 5 8 1 1 0 0 1
+pinnumber=5
+T 1150 7250 5 8 0 1 0 0 1
+pinseq=5
+T 1000 50 9 10 0 1 0 6 1
+pintype=pwr
+}
+V 250 3200 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 0 3200 200 3200 1 0 0
+{
+T 350 3200 9 10 1 1 0 1 1
+pinlabel=\_SHDN\_
+T 200 3250 5 8 1 1 0 6 1
+pinnumber=6
+T 200 3250 5 8 0 1 0 6 1
+pinseq=6
+T 200 3250 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 2400 300 2400 1 0 0
+{
+T 350 2400 9 10 1 1 0 1 1
+pinlabel=SCL
+T 200 2450 5 8 1 1 0 6 1
+pinnumber=7
+T 200 2450 5 8 0 1 0 6 1
+pinseq=7
+T 200 2450 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 2000 300 2000 1 0 0
+{
+T 350 2000 9 10 1 1 0 1 1
+pinlabel=SDA
+T 200 2050 5 8 1 1 0 6 1
+pinnumber=8
+T 200 2050 5 8 0 1 0 6 1
+pinseq=8
+T 200 2050 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 1200 300 1200 1 0 0
+{
+T 350 1200 9 10 1 1 0 1 1
+pinlabel=AD0
+T 200 1250 5 8 1 1 0 6 1
+pinnumber=9
+T 200 1250 5 8 0 1 0 6 1
+pinseq=9
+T 200 1250 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 800 300 800 1 0 0
+{
+T 350 800 9 10 1 1 0 1 1
+pinlabel=AD1
+T 200 850 5 8 1 1 0 6 1
+pinnumber=10
+T 200 850 5 8 0 1 0 6 1
+pinseq=10
+T 200 850 9 10 0 1 0 6 1
+pintype=in
+}
+P 900 0 900 300 1 0 0
+{
+T 900 350 9 10 1 1 90 1 1
+pinlabel=DGND
+T 950 250 5 8 1 1 0 2 1
+pinnumber=11
+T 950 250 5 8 0 1 0 2 1
+pinseq=11
+T 800 550 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 1300 0 1300 300 1 0 0
+{
+T 1300 350 9 10 1 1 90 1 1
+pinlabel=VSS
+T 1350 250 5 8 1 1 0 2 1
+pinnumber=12
+T 1350 250 5 8 0 1 0 2 1
+pinseq=12
+T 1200 550 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 2100 4800 1800 4800 1 0 0
+{
+T 1750 4800 9 10 1 1 0 7 1
+pinlabel=O2
+T 1900 4850 5 8 1 1 0 0 1
+pinnumber=13
+T 1900 4850 5 8 0 1 0 0 1
+pinseq=13
+T 1700 4850 9 10 0 1 0 6 1
+pintype=out
+}
+P 0 4000 300 4000 1 0 0
+{
+T 350 4000 9 10 1 1 0 1 1
+pinlabel=B2
+T 200 4050 5 8 1 1 0 6 1
+pinnumber=14
+T 200 4050 5 8 0 1 0 6 1
+pinseq=14
+T 200 4050 9 10 0 1 0 6 1
+pintype=pas
+}
+P 0 4400 300 4400 1 0 0
+{
+T 350 4400 9 10 1 1 0 1 1
+pinlabel=W2
+T 200 4450 5 8 1 1 0 6 1
+pinnumber=15
+T 200 4450 5 8 0 1 0 6 1
+pinseq=15
+T 200 4450 9 10 0 1 0 6 1
+pintype=pas
+}
+P 0 4800 300 4800 1 0 0
+{
+T 350 4800 9 10 1 1 0 1 1
+pinlabel=A2
+T 200 4850 5 8 1 1 0 6 1
+pinnumber=16
+T 200 4850 5 8 0 1 0 6 1
+pinseq=16
+T 200 4850 9 10 0 1 0 6 1
+pintype=pas
+}
diff --git a/test-pcb/sym/ads8201-1.sym b/test-pcb/sym/ads8201-1.sym
new file mode 100644
index 0000000..459a8f3
--- /dev/null
+++ b/test-pcb/sym/ads8201-1.sym
@@ -0,0 +1,277 @@
+v 20060123 1
+B 300 300 3000 6700 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 3300 7100 9 10 0 0 0 0 1
+document=ads8201.pdf
+T 3300 7300 9 10 0 0 0 0 1
+footprint=QFN_24N__TI
+T 1800 5800 9 10 1 1 0 3 1
+refdes=U?
+T 1800 5400 9 10 1 1 0 3 1
+ADS8201
+P 0 4400 300 4400 1 0 0
+{
+T 350 4400 9 10 1 1 0 1 1
+pinlabel=IN4
+T 200 4450 5 8 1 1 0 6 1
+pinnumber=1
+T 200 4450 5 8 0 1 0 6 1
+pinseq=1
+T 200 4450 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 4000 300 4000 1 0 0
+{
+T 350 4000 9 10 1 1 0 1 1
+pinlabel=IN5
+T 200 4050 5 8 1 1 0 6 1
+pinnumber=2
+T 200 4050 5 8 0 1 0 6 1
+pinseq=2
+T 200 4050 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 3600 300 3600 1 0 0
+{
+T 350 3600 9 10 1 1 0 1 1
+pinlabel=IN6
+T 200 3650 5 8 1 1 0 6 1
+pinnumber=3
+T 200 3650 5 8 0 1 0 6 1
+pinseq=3
+T 200 3650 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 3200 300 3200 1 0 0
+{
+T 350 3200 9 10 1 1 0 1 1
+pinlabel=IN7
+T 200 3250 5 8 1 1 0 6 1
+pinnumber=4
+T 200 3250 5 8 0 1 0 6 1
+pinseq=4
+T 200 3250 9 10 0 1 0 6 1
+pintype=in
+}
+V 250 2800 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 0 2800 200 2800 1 0 0
+{
+T 350 2800 9 10 1 1 0 1 1
+pinlabel=\_RST\_
+T 200 2850 5 8 1 1 0 6 1
+pinnumber=5
+T 200 2850 5 8 0 1 0 6 1
+pinseq=5
+T 200 2850 9 10 0 1 0 6 1
+pintype=in
+}
+P 3600 6000 3300 6000 1 0 0
+{
+T 3250 6000 9 10 1 1 0 7 1
+pinlabel=BUSY/INT
+T 3400 6050 5 8 1 1 0 0 1
+pinnumber=6
+T 3400 6050 5 8 0 1 0 0 1
+pinseq=6
+T 3200 6050 9 10 0 1 0 6 1
+pintype=out
+}
+P 0 2400 300 2400 1 0 0
+{
+T 350 2400 9 10 1 1 0 1 1
+pinlabel=SCLK
+T 200 2450 5 8 1 1 0 6 1
+pinnumber=7
+T 200 2450 5 8 0 1 0 6 1
+pinseq=7
+T 200 2450 9 10 0 1 0 6 1
+pintype=in
+}
+V 250 2000 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 0 2000 200 2000 1 0 0
+{
+T 350 2000 9 10 1 1 0 1 1
+pinlabel=\_CS\_
+T 200 2050 5 8 1 1 0 6 1
+pinnumber=8
+T 200 2050 5 8 0 1 0 6 1
+pinseq=8
+T 200 2050 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 1600 300 1600 1 0 0
+{
+T 350 1600 9 10 1 1 0 1 1
+pinlabel=SDI
+T 200 1650 5 8 1 1 0 6 1
+pinnumber=9
+T 200 1650 5 8 0 1 0 6 1
+pinseq=9
+T 200 1650 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 1200 300 1200 1 0 0
+{
+T 350 1200 9 10 1 1 0 1 1
+pinlabel=SDO
+T 200 1250 5 8 1 1 0 6 1
+pinnumber=10
+T 200 1250 5 8 0 1 0 6 1
+pinseq=10
+T 200 1250 9 10 0 1 0 6 1
+pintype=out
+}
+P 1600 0 1600 300 1 0 0
+{
+T 1600 350 9 10 1 1 90 1 1
+pinlabel=DGND
+T 1650 250 5 8 1 1 0 2 1
+pinnumber=11
+T 1650 250 5 8 0 1 0 2 1
+pinseq=11
+T 1500 550 9 10 0 1 0 6 1
+pintype=pwr
+}
+V 250 800 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+P 0 800 200 800 1 0 0
+{
+T 350 800 9 10 1 1 0 1 1
+pinlabel=\_CONVST\_
+T 200 850 5 8 1 1 0 6 1
+pinnumber=12
+T 200 850 5 8 0 1 0 6 1
+pinseq=12
+T 200 850 9 10 0 1 0 6 1
+pintype=in
+}
+P 1600 7300 1600 7000 1 0 0
+{
+T 1600 6950 9 10 1 1 90 7 1
+pinlabel=VDDIO
+T 1650 7050 5 8 1 1 0 0 1
+pinnumber=13
+T 1650 7050 5 8 0 1 0 0 1
+pinseq=13
+T 1500 50 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 2000 7300 2000 7000 1 0 0
+{
+T 2000 6950 9 10 1 1 90 7 1
+pinlabel=VDDA
+T 2050 7050 5 8 1 1 0 0 1
+pinnumber=14
+T 2050 7050 5 8 0 1 0 0 1
+pinseq=14
+T 1900 50 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 3600 5600 3300 5600 1 0 0
+{
+T 3250 5600 9 10 1 1 0 7 1
+pinlabel=REF
+T 3400 5650 5 8 1 1 0 0 1
+pinnumber=15
+T 3400 5650 5 8 0 1 0 0 1
+pinseq=15
+T 3200 5650 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 3600 5200 3300 5200 1 0 0
+{
+T 3250 5200 9 10 1 1 0 7 1
+pinlabel=REFGND
+T 3400 5250 5 8 1 1 0 0 1
+pinnumber=16
+T 3400 5250 5 8 0 1 0 0 1
+pinseq=16
+T 3200 5250 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 2000 0 2000 300 1 0 0
+{
+T 2000 350 9 10 1 1 90 1 1
+pinlabel=GNDA
+T 2050 250 5 8 1 1 0 2 1
+pinnumber=17
+T 2050 250 5 8 0 1 0 2 1
+pinseq=17
+T 1900 550 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 3600 4400 3300 4400 1 0 0
+{
+T 3250 4400 9 10 1 1 0 7 1
+pinlabel=ADCIN
+T 3400 4450 5 8 1 1 0 0 1
+pinnumber=18
+T 3400 4450 5 8 0 1 0 0 1
+pinseq=18
+T 3200 4450 9 10 0 1 0 6 1
+pintype=in
+}
+P 3600 4800 3300 4800 1 0 0
+{
+T 3250 4800 9 10 1 1 0 7 1
+pinlabel=PGAOUT
+T 3400 4850 5 8 1 1 0 0 1
+pinnumber=19
+T 3400 4850 5 8 0 1 0 0 1
+pinseq=19
+T 3200 4850 9 10 0 1 0 6 1
+pintype=out
+}
+P 3600 4000 3300 4000 1 0 0
+{
+T 3250 4000 9 10 1 1 0 7 1
+pinlabel=PGAREF
+T 3400 4050 5 8 1 1 0 0 1
+pinnumber=20
+T 3400 4050 5 8 0 1 0 0 1
+pinseq=20
+T 3200 4050 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 6000 300 6000 1 0 0
+{
+T 350 6000 9 10 1 1 0 1 1
+pinlabel=IN0
+T 200 6050 5 8 1 1 0 6 1
+pinnumber=21
+T 200 6050 5 8 0 1 0 6 1
+pinseq=21
+T 200 6050 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 5600 300 5600 1 0 0
+{
+T 350 5600 9 10 1 1 0 1 1
+pinlabel=IN1
+T 200 5650 5 8 1 1 0 6 1
+pinnumber=22
+T 200 5650 5 8 0 1 0 6 1
+pinseq=22
+T 200 5650 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 5200 300 5200 1 0 0
+{
+T 350 5200 9 10 1 1 0 1 1
+pinlabel=IN2
+T 200 5250 5 8 1 1 0 6 1
+pinnumber=23
+T 200 5250 5 8 0 1 0 6 1
+pinseq=23
+T 200 5250 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 4800 300 4800 1 0 0
+{
+T 350 4800 9 10 1 1 0 1 1
+pinlabel=IN3
+T 200 4850 5 8 1 1 0 6 1
+pinnumber=24
+T 200 4850 5 8 0 1 0 6 1
+pinseq=24
+T 200 4850 9 10 0 1 0 6 1
+pintype=in
+}
diff --git a/test-pcb/sym/cc430f5137-1.sym b/test-pcb/sym/cc430f5137-1.sym
new file mode 100644
index 0000000..089c8f8
--- /dev/null
+++ b/test-pcb/sym/cc430f5137-1.sym
@@ -0,0 +1,549 @@
+v 20060123 1
+B 300 300 7500 14900 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 4100 14000 9 10 1 1 0 3 1
+refdes=U?
+T 4100 13600 9 10 1 1 0 3 1
+CC430F5137
+T 4100 13200 9 10 1 1 0 3 1
+footprint=QFN_48N__TI.fp
+T 4100 12800 9 10 1 1 0 3 1
+document=cc430f5137.pdf
+P 0 14200 300 14200 1 0 0
+{
+T 350 14200 9 10 1 1 0 1 1
+pinlabel=P2.2/TA1CCR1A/CB2/A2
+T 200 14250 5 8 1 1 0 6 1
+pinnumber=1
+T 200 14250 5 8 0 1 0 6 1
+pinseq=1
+T 200 14250 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 13800 300 13800 1 0 0
+{
+T 350 13800 9 10 1 1 0 1 1
+pinlabel=P2.1/TA1CCR0A/CB1/A1
+T 200 13850 5 8 1 1 0 6 1
+pinnumber=2
+T 200 13850 5 8 0 1 0 6 1
+pinseq=2
+T 200 13850 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 13400 300 13400 1 0 0
+{
+T 350 13400 9 10 1 1 0 1 1
+pinlabel=P2.0/CBOUT1/TA1CLK/CB0/A0
+T 200 13450 5 8 1 1 0 6 1
+pinnumber=3
+T 200 13450 5 8 0 1 0 6 1
+pinseq=3
+T 200 13450 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 13000 300 13000 1 0 0
+{
+T 350 13000 9 10 1 1 0 1 1
+pinlabel=P1.7/UCA0CLK/UCB0STE
+T 200 13050 5 8 1 1 0 6 1
+pinnumber=4
+T 200 13050 5 8 0 1 0 6 1
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+T 200 13050 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 12600 300 12600 1 0 0
+{
+T 350 12600 9 10 1 1 0 1 1
+pinlabel=P1.6/UCA0TXD/UCA0MOSI
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+pinnumber=5
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+pinseq=5
+T 200 12650 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 12200 300 12200 1 0 0
+{
+T 350 12200 9 10 1 1 0 1 1
+pinlabel=P1.5/UCA0RXD/UCA0MISO
+T 200 12250 5 8 1 1 0 6 1
+pinnumber=6
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+pinseq=6
+T 200 12250 9 10 0 1 0 6 1
+pintype=inout
+}
+P 3500 15500 3500 15200 1 0 0
+{
+T 3500 15150 9 10 1 1 90 7 1
+pinlabel=VCORE
+T 3550 15250 5 8 1 1 0 0 1
+pinnumber=7
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+pinseq=7
+T 3400 50 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 3900 15500 3900 15200 1 0 0
+{
+T 3900 15150 9 10 1 1 90 7 1
+pinlabel=DVCC
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+pinnumber=8
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+pinseq=8
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+pintype=pwr
+}
+P 0 11800 300 11800 1 0 0
+{
+T 350 11800 9 10 1 1 0 1 1
+pinlabel=P1.4/UCB0CLK/UCA0STE
+T 200 11850 5 8 1 1 0 6 1
+pinnumber=9
+T 200 11850 5 8 0 1 0 6 1
+pinseq=9
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+pintype=inout
+}
+P 0 11400 300 11400 1 0 0
+{
+T 350 11400 9 10 1 1 0 1 1
+pinlabel=P1.3/UCB0MOSI/UCB0SDA
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+pinnumber=10
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+pintype=inout
+}
+P 0 11000 300 11000 1 0 0
+{
+T 350 11000 9 10 1 1 0 1 1
+pinlabel=P1.2/UCB0MISO/UCB0SCL
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+T 200 11050 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 10600 300 10600 1 0 0
+{
+T 350 10600 9 10 1 1 0 1 1
+pinlabel=P1.1/RFGDO2
+T 200 10650 5 8 1 1 0 6 1
+pinnumber=12
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+pinseq=12
+T 200 10650 9 10 0 1 0 6 1
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+}
+P 0 10200 300 10200 1 0 0
+{
+T 350 10200 9 10 1 1 0 1 1
+pinlabel=P1.0/RFGDO0
+T 200 10250 5 8 1 1 0 6 1
+pinnumber=13
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+pinseq=13
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+pintype=inout
+}
+P 0 9800 300 9800 1 0 0
+{
+T 350 9800 9 10 1 1 0 1 1
+pinlabel=P3.7/SMCLK
+T 200 9850 5 8 1 1 0 6 1
+pinnumber=14
+T 200 9850 5 8 0 1 0 6 1
+pinseq=14
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+}
+P 0 9400 300 9400 1 0 0
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+pinlabel=P3.6/RFGDO1
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+pinseq=15
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+pintype=inout
+}
+P 0 9000 300 9000 1 0 0
+{
+T 350 9000 9 10 1 1 0 1 1
+pinlabel=P3.5/TA0CCR4A
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+pinnumber=16
+T 200 9050 5 8 0 1 0 6 1
+pinseq=16
+T 200 9050 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 8600 300 8600 1 0 0
+{
+T 350 8600 9 10 1 1 0 1 1
+pinlabel=P3.4/TA0CCR3A
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+}
+P 0 8200 300 8200 1 0 0
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+pintype=inout
+}
+P 0 7800 300 7800 1 0 0
+{
+T 350 7800 9 10 1 1 0 1 1
+pinlabel=P3.2/TA0CCR1A
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+pinnumber=19
+T 200 7850 5 8 0 1 0 6 1
+pinseq=19
+T 200 7850 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 7400 300 7400 1 0 0
+{
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+pinlabel=P3.1/TA0CCR0A
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+T 200 7450 5 8 0 1 0 6 1
+pinseq=20
+T 200 7450 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 7000 300 7000 1 0 0
+{
+T 350 7000 9 10 1 1 0 1 1
+pinlabel=P3.0/CBOUT0/TA0CLK
+T 200 7050 5 8 1 1 0 6 1
+pinnumber=21
+T 200 7050 5 8 0 1 0 6 1
+pinseq=21
+T 200 7050 9 10 0 1 0 6 1
+pintype=inout
+}
+P 4300 15500 4300 15200 1 0 0
+{
+T 4300 15150 9 10 1 1 90 7 1
+pinlabel=DVCC
+T 4350 15250 5 8 1 1 0 0 1
+pinnumber=22
+T 4350 15250 5 8 0 1 0 0 1
+pinseq=22
+T 4200 50 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 6600 300 6600 1 0 0
+{
+T 350 6600 9 10 1 1 0 1 1
+pinlabel=P2.7/ADC12CLK/DMAE0
+T 200 6650 5 8 1 1 0 6 1
+pinnumber=23
+T 200 6650 5 8 0 1 0 6 1
+pinseq=23
+T 200 6650 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 6200 300 6200 1 0 0
+{
+T 350 6200 9 10 1 1 0 1 1
+pinlabel=P2.6/ACLK
+T 200 6250 5 8 1 1 0 6 1
+pinnumber=24
+T 200 6250 5 8 0 1 0 6 1
+pinseq=24
+T 200 6250 9 10 0 1 0 6 1
+pintype=inout
+}
+P 8100 14200 7800 14200 1 0 0
+{
+T 7750 14200 9 10 1 1 0 7 1
+pinlabel=RF_Xi
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diff --git a/test-pcb/sym/wb430-1.sym b/test-pcb/sym/wb430-1.sym
new file mode 100644
index 0000000..5dc151b
--- /dev/null
+++ b/test-pcb/sym/wb430-1.sym
@@ -0,0 +1,1109 @@
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
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+}
+P 12700 9900 12400 9900 1 0 0
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+}
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+}
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+}
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+}
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+}
+P 10400 12700 10400 12400 1 0 0
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+}
+P 10000 12700 10000 12400 1 0 0
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+}
+P 9600 12700 9600 12400 1 0 0
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+}
+P 9200 12700 9200 12400 1 0 0
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+}
+P 8800 12700 8800 12400 1 0 0
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+}
+P 8400 12700 8400 12400 1 0 0
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+}
+P 8000 12700 8000 12400 1 0 0
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+}
+P 7600 12700 7600 12400 1 0 0
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+}
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+}
+P 6800 12700 6800 12400 1 0 0
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+}
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+}
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+}
+P 5600 12700 5600 12400 1 0 0
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+}
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+}
+P 4800 12700 4800 12400 1 0 0
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+}
+P 4400 12700 4400 12400 1 0 0
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+}
+P 4000 12700 4000 12400 1 0 0
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+}
+P 3600 12700 3600 12400 1 0 0
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+}
+P 3200 12700 3200 12400 1 0 0
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+}
+P 2800 12700 2800 12400 1 0 0
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+}
+P 2400 12700 2400 12400 1 0 0
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+}
+P 2000 12700 2000 12400 1 0 0
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+}
+P 1600 12700 1600 12400 1 0 0
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+}
-- 
2.25.1