From a530f1394b99236aed2130c60f0976c1e4e3fd9d Mon Sep 17 00:00:00 2001
From: Dan White <dan@whiteaudio.com>
Date: Wed, 25 Jan 2012 14:13:01 -0600
Subject: [PATCH] Split CC430 into 6 symbols

---
 test-pcb/sym/cc430f5137-1.djboxsym |  70 +---
 test-pcb/sym/cc430f5137-1.sym      | 551 +++--------------------------
 test-pcb/sym/cc430f5137-2.djboxsym |  20 ++
 test-pcb/sym/cc430f5137-2.sym      |  76 ++++
 test-pcb/sym/cc430f5137-3.djboxsym |  22 ++
 test-pcb/sym/cc430f5137-3.sym      |  98 +++++
 test-pcb/sym/cc430f5137-4.djboxsym |  40 +++
 test-pcb/sym/cc430f5137-4.sym      | 142 ++++++++
 test-pcb/sym/cc430f5137-5.djboxsym |  20 ++
 test-pcb/sym/cc430f5137-5.sym      |  76 ++++
 test-pcb/sym/cc430f5137-6.djboxsym |  23 ++
 test-pcb/sym/cc430f5137-6.sym      | 109 ++++++
 12 files changed, 695 insertions(+), 552 deletions(-)
 create mode 100644 test-pcb/sym/cc430f5137-2.djboxsym
 create mode 100644 test-pcb/sym/cc430f5137-2.sym
 create mode 100644 test-pcb/sym/cc430f5137-3.djboxsym
 create mode 100644 test-pcb/sym/cc430f5137-3.sym
 create mode 100644 test-pcb/sym/cc430f5137-4.djboxsym
 create mode 100644 test-pcb/sym/cc430f5137-4.sym
 create mode 100644 test-pcb/sym/cc430f5137-5.djboxsym
 create mode 100644 test-pcb/sym/cc430f5137-5.sym
 create mode 100644 test-pcb/sym/cc430f5137-6.djboxsym
 create mode 100644 test-pcb/sym/cc430f5137-6.sym

diff --git a/test-pcb/sym/cc430f5137-1.djboxsym b/test-pcb/sym/cc430f5137-1.djboxsym
index bf15594..efc3942 100644
--- a/test-pcb/sym/cc430f5137-1.djboxsym
+++ b/test-pcb/sym/cc430f5137-1.djboxsym
@@ -1,68 +1,32 @@
+#
+# cc430f5137
+#
 
---vmode
 
 [labels]
-refdes=U?
+refdes=CC430
 CC430F5137
-footprint=QFN_48N__TI.fp
-document=cc430f5137.pdf
+RF
+1of6
+
+! footprint=QFN_48N__TI.fp
+! document=cc430f5137.pdf
 
 
 [left]
-1	io	P2.2/TA1CCR1A/CB2/A2
-2	io	P2.1/TA1CCR0A/CB1/A1
-3	io	P2.0/CBOUT1/TA1CLK/CB0/A0
-4	io	P1.7/UCA0CLK/UCB0STE
-5	io	P1.6/UCA0TXD/UCA0MOSI
-6	io	P1.5/UCA0RXD/UCA0MISO
-9	io	P1.4/UCB0CLK/UCA0STE
-10	io	P1.3/UCB0MOSI/UCB0SDA
-11	io	P1.2/UCB0MISO/UCB0SCL
-12	io	P1.1/RFGDO2
-13	io	P1.0/RFGDO0
-14	io	P3.7/SMCLK
-15	io	P3.6/RFGDO1
-16	io	P3.5/TA0CCR4A
-17	io	P3.4/TA0CCR3A
-18	io	P3.3/TA0CCR2A
-19	io	P3.2/TA0CCR1A
-20	io	P3.1/TA0CCR0A
-21	io	P3.0/CBOUT0/TA0CLK
-23	io	P2.7/ADC12CLK/DMAE0
-24	io	P2.6/ACLK
-35	io	PJ.0/TDO
-36	io	PJ.1/TDI/TCLK
-37	io	PJ.2/TMS
-38	io	PJ.3/TCK
-39	i	TEST/SBWTCK
-40	io	\_RST\_/NMI/SBWTDIO
-42	p	AVSS
-43	io	P5.1/XOUT
-44	io	P5.0/Xi
-45	p	AVCC
-46	io	P2.5/SVMOUT/CB5/A5/VREF+/VeREF+
-47	io	P2.4/RTCCLK/CB4/A4/VREF-/VeREF-
-48	io	P2.3/TA1CCR2A/CB3/A3
+25	i	RF_Xi
+26	o	RF_XOUT
 
-[top]
-7	p	VCORE
-8	p	DVCC
-22	p	DVCC
-41	p	DVCC
+33		RBIAS
 
-[bottom]
-49	p	VSS_EP
 
 [right]
-25	i	RF_Xi
-26	o	RF_XOUT
-27	p	AVCC_RF
-28	p	AVCC_RF
 29	io	RF_P
 30	io	RF_N
-31	p	AVCC_RF
-32	p	AVCC_RF
-33		RBIAS
-34		GUARD
+
+12	io	P1.1/RFGDO2
+13	io	P1.0/RFGDO0
+15	io	P3.6/RFGDO1
+
 
 # vim:softtabstop=0 noexpandtab ft=sh
diff --git a/test-pcb/sym/cc430f5137-1.sym b/test-pcb/sym/cc430f5137-1.sym
index 089c8f8..c10973a 100644
--- a/test-pcb/sym/cc430f5137-1.sym
+++ b/test-pcb/sym/cc430f5137-1.sym
@@ -1,549 +1,102 @@
 v 20060123 1
-B 300 300 7500 14900 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
-T 4100 14000 9 10 1 1 0 3 1
-refdes=U?
-T 4100 13600 9 10 1 1 0 3 1
-CC430F5137
-T 4100 13200 9 10 1 1 0 3 1
-footprint=QFN_48N__TI.fp
-T 4100 12800 9 10 1 1 0 3 1
+B 300 300 4000 2800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 4300 3200 9 10 0 0 0 0 1
 document=cc430f5137.pdf
-P 0 14200 300 14200 1 0 0
-{
-T 350 14200 9 10 1 1 0 1 1
-pinlabel=P2.2/TA1CCR1A/CB2/A2
-T 200 14250 5 8 1 1 0 6 1
-pinnumber=1
-T 200 14250 5 8 0 1 0 6 1
-pinseq=1
-T 200 14250 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 13800 300 13800 1 0 0
-{
-T 350 13800 9 10 1 1 0 1 1
-pinlabel=P2.1/TA1CCR0A/CB1/A1
-T 200 13850 5 8 1 1 0 6 1
-pinnumber=2
-T 200 13850 5 8 0 1 0 6 1
-pinseq=2
-T 200 13850 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 13400 300 13400 1 0 0
-{
-T 350 13400 9 10 1 1 0 1 1
-pinlabel=P2.0/CBOUT1/TA1CLK/CB0/A0
-T 200 13450 5 8 1 1 0 6 1
-pinnumber=3
-T 200 13450 5 8 0 1 0 6 1
-pinseq=3
-T 200 13450 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 13000 300 13000 1 0 0
-{
-T 350 13000 9 10 1 1 0 1 1
-pinlabel=P1.7/UCA0CLK/UCB0STE
-T 200 13050 5 8 1 1 0 6 1
-pinnumber=4
-T 200 13050 5 8 0 1 0 6 1
-pinseq=4
-T 200 13050 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 12600 300 12600 1 0 0
-{
-T 350 12600 9 10 1 1 0 1 1
-pinlabel=P1.6/UCA0TXD/UCA0MOSI
-T 200 12650 5 8 1 1 0 6 1
-pinnumber=5
-T 200 12650 5 8 0 1 0 6 1
-pinseq=5
-T 200 12650 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 12200 300 12200 1 0 0
-{
-T 350 12200 9 10 1 1 0 1 1
-pinlabel=P1.5/UCA0RXD/UCA0MISO
-T 200 12250 5 8 1 1 0 6 1
-pinnumber=6
-T 200 12250 5 8 0 1 0 6 1
-pinseq=6
-T 200 12250 9 10 0 1 0 6 1
-pintype=inout
-}
-P 3500 15500 3500 15200 1 0 0
-{
-T 3500 15150 9 10 1 1 90 7 1
-pinlabel=VCORE
-T 3550 15250 5 8 1 1 0 0 1
-pinnumber=7
-T 3550 15250 5 8 0 1 0 0 1
-pinseq=7
-T 3400 50 9 10 0 1 0 6 1
-pintype=pwr
-}
-P 3900 15500 3900 15200 1 0 0
-{
-T 3900 15150 9 10 1 1 90 7 1
-pinlabel=DVCC
-T 3950 15250 5 8 1 1 0 0 1
-pinnumber=8
-T 3950 15250 5 8 0 1 0 0 1
-pinseq=8
-T 3800 50 9 10 0 1 0 6 1
-pintype=pwr
-}
-P 0 11800 300 11800 1 0 0
-{
-T 350 11800 9 10 1 1 0 1 1
-pinlabel=P1.4/UCB0CLK/UCA0STE
-T 200 11850 5 8 1 1 0 6 1
-pinnumber=9
-T 200 11850 5 8 0 1 0 6 1
-pinseq=9
-T 200 11850 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 11400 300 11400 1 0 0
-{
-T 350 11400 9 10 1 1 0 1 1
-pinlabel=P1.3/UCB0MOSI/UCB0SDA
-T 200 11450 5 8 1 1 0 6 1
-pinnumber=10
-T 200 11450 5 8 0 1 0 6 1
-pinseq=10
-T 200 11450 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 11000 300 11000 1 0 0
-{
-T 350 11000 9 10 1 1 0 1 1
-pinlabel=P1.2/UCB0MISO/UCB0SCL
-T 200 11050 5 8 1 1 0 6 1
-pinnumber=11
-T 200 11050 5 8 0 1 0 6 1
-pinseq=11
-T 200 11050 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 10600 300 10600 1 0 0
+T 4300 3400 9 10 0 0 0 0 1
+footprint=QFN_48N__TI.fp
+T 2300 2500 9 10 1 1 0 3 1
+refdes=CC430
+T 2300 2100 9 10 1 1 0 3 1
+CC430F5137
+T 2300 1700 9 10 1 1 0 3 1
+RF
+T 2300 1300 9 10 1 1 0 3 1
+1of6
+P 4600 1500 4300 1500 1 0 0
 {
-T 350 10600 9 10 1 1 0 1 1
+T 4250 1500 9 10 1 1 0 7 1
 pinlabel=P1.1/RFGDO2
-T 200 10650 5 8 1 1 0 6 1
+T 4400 1550 5 8 1 1 0 0 1
 pinnumber=12
-T 200 10650 5 8 0 1 0 6 1
+T 4400 1550 5 8 0 1 0 0 1
 pinseq=12
-T 200 10650 9 10 0 1 0 6 1
+T 4200 1550 9 10 0 1 0 6 1
 pintype=inout
 }
-P 0 10200 300 10200 1 0 0
+P 4600 1100 4300 1100 1 0 0
 {
-T 350 10200 9 10 1 1 0 1 1
+T 4250 1100 9 10 1 1 0 7 1
 pinlabel=P1.0/RFGDO0
-T 200 10250 5 8 1 1 0 6 1
+T 4400 1150 5 8 1 1 0 0 1
 pinnumber=13
-T 200 10250 5 8 0 1 0 6 1
+T 4400 1150 5 8 0 1 0 0 1
 pinseq=13
-T 200 10250 9 10 0 1 0 6 1
+T 4200 1150 9 10 0 1 0 6 1
 pintype=inout
 }
-P 0 9800 300 9800 1 0 0
+P 4600 700 4300 700 1 0 0
 {
-T 350 9800 9 10 1 1 0 1 1
-pinlabel=P3.7/SMCLK
-T 200 9850 5 8 1 1 0 6 1
-pinnumber=14
-T 200 9850 5 8 0 1 0 6 1
-pinseq=14
-T 200 9850 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 9400 300 9400 1 0 0
-{
-T 350 9400 9 10 1 1 0 1 1
+T 4250 700 9 10 1 1 0 7 1
 pinlabel=P3.6/RFGDO1
-T 200 9450 5 8 1 1 0 6 1
+T 4400 750 5 8 1 1 0 0 1
 pinnumber=15
-T 200 9450 5 8 0 1 0 6 1
+T 4400 750 5 8 0 1 0 0 1
 pinseq=15
-T 200 9450 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 9000 300 9000 1 0 0
-{
-T 350 9000 9 10 1 1 0 1 1
-pinlabel=P3.5/TA0CCR4A
-T 200 9050 5 8 1 1 0 6 1
-pinnumber=16
-T 200 9050 5 8 0 1 0 6 1
-pinseq=16
-T 200 9050 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 8600 300 8600 1 0 0
-{
-T 350 8600 9 10 1 1 0 1 1
-pinlabel=P3.4/TA0CCR3A
-T 200 8650 5 8 1 1 0 6 1
-pinnumber=17
-T 200 8650 5 8 0 1 0 6 1
-pinseq=17
-T 200 8650 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 8200 300 8200 1 0 0
-{
-T 350 8200 9 10 1 1 0 1 1
-pinlabel=P3.3/TA0CCR2A
-T 200 8250 5 8 1 1 0 6 1
-pinnumber=18
-T 200 8250 5 8 0 1 0 6 1
-pinseq=18
-T 200 8250 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 7800 300 7800 1 0 0
-{
-T 350 7800 9 10 1 1 0 1 1
-pinlabel=P3.2/TA0CCR1A
-T 200 7850 5 8 1 1 0 6 1
-pinnumber=19
-T 200 7850 5 8 0 1 0 6 1
-pinseq=19
-T 200 7850 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 7400 300 7400 1 0 0
-{
-T 350 7400 9 10 1 1 0 1 1
-pinlabel=P3.1/TA0CCR0A
-T 200 7450 5 8 1 1 0 6 1
-pinnumber=20
-T 200 7450 5 8 0 1 0 6 1
-pinseq=20
-T 200 7450 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 7000 300 7000 1 0 0
-{
-T 350 7000 9 10 1 1 0 1 1
-pinlabel=P3.0/CBOUT0/TA0CLK
-T 200 7050 5 8 1 1 0 6 1
-pinnumber=21
-T 200 7050 5 8 0 1 0 6 1
-pinseq=21
-T 200 7050 9 10 0 1 0 6 1
-pintype=inout
-}
-P 4300 15500 4300 15200 1 0 0
-{
-T 4300 15150 9 10 1 1 90 7 1
-pinlabel=DVCC
-T 4350 15250 5 8 1 1 0 0 1
-pinnumber=22
-T 4350 15250 5 8 0 1 0 0 1
-pinseq=22
-T 4200 50 9 10 0 1 0 6 1
-pintype=pwr
-}
-P 0 6600 300 6600 1 0 0
-{
-T 350 6600 9 10 1 1 0 1 1
-pinlabel=P2.7/ADC12CLK/DMAE0
-T 200 6650 5 8 1 1 0 6 1
-pinnumber=23
-T 200 6650 5 8 0 1 0 6 1
-pinseq=23
-T 200 6650 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 6200 300 6200 1 0 0
-{
-T 350 6200 9 10 1 1 0 1 1
-pinlabel=P2.6/ACLK
-T 200 6250 5 8 1 1 0 6 1
-pinnumber=24
-T 200 6250 5 8 0 1 0 6 1
-pinseq=24
-T 200 6250 9 10 0 1 0 6 1
+T 4200 750 9 10 0 1 0 6 1
 pintype=inout
 }
-P 8100 14200 7800 14200 1 0 0
+P 0 2700 300 2700 1 0 0
 {
-T 7750 14200 9 10 1 1 0 7 1
+T 350 2700 9 10 1 1 0 1 1
 pinlabel=RF_Xi
-T 7900 14250 5 8 1 1 0 0 1
+T 200 2750 5 8 1 1 0 6 1
 pinnumber=25
-T 7900 14250 5 8 0 1 0 0 1
+T 200 2750 5 8 0 1 0 6 1
 pinseq=25
-T 7700 14250 9 10 0 1 0 6 1
+T 200 2750 9 10 0 1 0 6 1
 pintype=in
 }
-P 8100 13800 7800 13800 1 0 0
+P 0 2300 300 2300 1 0 0
 {
-T 7750 13800 9 10 1 1 0 7 1
+T 350 2300 9 10 1 1 0 1 1
 pinlabel=RF_XOUT
-T 7900 13850 5 8 1 1 0 0 1
+T 200 2350 5 8 1 1 0 6 1
 pinnumber=26
-T 7900 13850 5 8 0 1 0 0 1
+T 200 2350 5 8 0 1 0 6 1
 pinseq=26
-T 7700 13850 9 10 0 1 0 6 1
+T 200 2350 9 10 0 1 0 6 1
 pintype=out
 }
-P 8100 13400 7800 13400 1 0 0
-{
-T 7750 13400 9 10 1 1 0 7 1
-pinlabel=AVCC_RF
-T 7900 13450 5 8 1 1 0 0 1
-pinnumber=27
-T 7900 13450 5 8 0 1 0 0 1
-pinseq=27
-T 7700 13450 9 10 0 1 0 6 1
-pintype=pwr
-}
-P 8100 13000 7800 13000 1 0 0
+P 4600 2700 4300 2700 1 0 0
 {
-T 7750 13000 9 10 1 1 0 7 1
-pinlabel=AVCC_RF
-T 7900 13050 5 8 1 1 0 0 1
-pinnumber=28
-T 7900 13050 5 8 0 1 0 0 1
-pinseq=28
-T 7700 13050 9 10 0 1 0 6 1
-pintype=pwr
-}
-P 8100 12600 7800 12600 1 0 0
-{
-T 7750 12600 9 10 1 1 0 7 1
+T 4250 2700 9 10 1 1 0 7 1
 pinlabel=RF_P
-T 7900 12650 5 8 1 1 0 0 1
+T 4400 2750 5 8 1 1 0 0 1
 pinnumber=29
-T 7900 12650 5 8 0 1 0 0 1
+T 4400 2750 5 8 0 1 0 0 1
 pinseq=29
-T 7700 12650 9 10 0 1 0 6 1
+T 4200 2750 9 10 0 1 0 6 1
 pintype=inout
 }
-P 8100 12200 7800 12200 1 0 0
+P 4600 2300 4300 2300 1 0 0
 {
-T 7750 12200 9 10 1 1 0 7 1
+T 4250 2300 9 10 1 1 0 7 1
 pinlabel=RF_N
-T 7900 12250 5 8 1 1 0 0 1
+T 4400 2350 5 8 1 1 0 0 1
 pinnumber=30
-T 7900 12250 5 8 0 1 0 0 1
+T 4400 2350 5 8 0 1 0 0 1
 pinseq=30
-T 7700 12250 9 10 0 1 0 6 1
+T 4200 2350 9 10 0 1 0 6 1
 pintype=inout
 }
-P 8100 11800 7800 11800 1 0 0
-{
-T 7750 11800 9 10 1 1 0 7 1
-pinlabel=AVCC_RF
-T 7900 11850 5 8 1 1 0 0 1
-pinnumber=31
-T 7900 11850 5 8 0 1 0 0 1
-pinseq=31
-T 7700 11850 9 10 0 1 0 6 1
-pintype=pwr
-}
-P 8100 11400 7800 11400 1 0 0
+P 0 1500 300 1500 1 0 0
 {
-T 7750 11400 9 10 1 1 0 7 1
-pinlabel=AVCC_RF
-T 7900 11450 5 8 1 1 0 0 1
-pinnumber=32
-T 7900 11450 5 8 0 1 0 0 1
-pinseq=32
-T 7700 11450 9 10 0 1 0 6 1
-pintype=pwr
-}
-P 8100 11000 7800 11000 1 0 0
-{
-T 7750 11000 9 10 1 1 0 7 1
+T 350 1500 9 10 1 1 0 1 1
 pinlabel=RBIAS
-T 7900 11050 5 8 1 1 0 0 1
+T 200 1550 5 8 1 1 0 6 1
 pinnumber=33
-T 7900 11050 5 8 0 1 0 0 1
+T 200 1550 5 8 0 1 0 6 1
 pinseq=33
-T 7700 11050 9 10 0 1 0 6 1
+T 200 1550 9 10 0 1 0 6 1
 pintype=pas
 }
-P 8100 10600 7800 10600 1 0 0
-{
-T 7750 10600 9 10 1 1 0 7 1
-pinlabel=GUARD
-T 7900 10650 5 8 1 1 0 0 1
-pinnumber=34
-T 7900 10650 5 8 0 1 0 0 1
-pinseq=34
-T 7700 10650 9 10 0 1 0 6 1
-pintype=pas
-}
-P 0 5800 300 5800 1 0 0
-{
-T 350 5800 9 10 1 1 0 1 1
-pinlabel=PJ.0/TDO
-T 200 5850 5 8 1 1 0 6 1
-pinnumber=35
-T 200 5850 5 8 0 1 0 6 1
-pinseq=35
-T 200 5850 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 5400 300 5400 1 0 0
-{
-T 350 5400 9 10 1 1 0 1 1
-pinlabel=PJ.1/TDI/TCLK
-T 200 5450 5 8 1 1 0 6 1
-pinnumber=36
-T 200 5450 5 8 0 1 0 6 1
-pinseq=36
-T 200 5450 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 5000 300 5000 1 0 0
-{
-T 350 5000 9 10 1 1 0 1 1
-pinlabel=PJ.2/TMS
-T 200 5050 5 8 1 1 0 6 1
-pinnumber=37
-T 200 5050 5 8 0 1 0 6 1
-pinseq=37
-T 200 5050 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 4600 300 4600 1 0 0
-{
-T 350 4600 9 10 1 1 0 1 1
-pinlabel=PJ.3/TCK
-T 200 4650 5 8 1 1 0 6 1
-pinnumber=38
-T 200 4650 5 8 0 1 0 6 1
-pinseq=38
-T 200 4650 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 4200 300 4200 1 0 0
-{
-T 350 4200 9 10 1 1 0 1 1
-pinlabel=TEST/SBWTCK
-T 200 4250 5 8 1 1 0 6 1
-pinnumber=39
-T 200 4250 5 8 0 1 0 6 1
-pinseq=39
-T 200 4250 9 10 0 1 0 6 1
-pintype=in
-}
-P 0 3800 300 3800 1 0 0
-{
-T 350 3800 9 10 1 1 0 1 1
-pinlabel=\_RST\_/NMI/SBWTDIO
-T 200 3850 5 8 1 1 0 6 1
-pinnumber=40
-T 200 3850 5 8 0 1 0 6 1
-pinseq=40
-T 200 3850 9 10 0 1 0 6 1
-pintype=inout
-}
-P 4700 15500 4700 15200 1 0 0
-{
-T 4700 15150 9 10 1 1 90 7 1
-pinlabel=DVCC
-T 4750 15250 5 8 1 1 0 0 1
-pinnumber=41
-T 4750 15250 5 8 0 1 0 0 1
-pinseq=41
-T 4600 50 9 10 0 1 0 6 1
-pintype=pwr
-}
-P 0 3400 300 3400 1 0 0
-{
-T 350 3400 9 10 1 1 0 1 1
-pinlabel=AVSS
-T 200 3450 5 8 1 1 0 6 1
-pinnumber=42
-T 200 3450 5 8 0 1 0 6 1
-pinseq=42
-T 200 3450 9 10 0 1 0 6 1
-pintype=pwr
-}
-P 0 3000 300 3000 1 0 0
-{
-T 350 3000 9 10 1 1 0 1 1
-pinlabel=P5.1/XOUT
-T 200 3050 5 8 1 1 0 6 1
-pinnumber=43
-T 200 3050 5 8 0 1 0 6 1
-pinseq=43
-T 200 3050 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 2600 300 2600 1 0 0
-{
-T 350 2600 9 10 1 1 0 1 1
-pinlabel=P5.0/Xi
-T 200 2650 5 8 1 1 0 6 1
-pinnumber=44
-T 200 2650 5 8 0 1 0 6 1
-pinseq=44
-T 200 2650 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 2200 300 2200 1 0 0
-{
-T 350 2200 9 10 1 1 0 1 1
-pinlabel=AVCC
-T 200 2250 5 8 1 1 0 6 1
-pinnumber=45
-T 200 2250 5 8 0 1 0 6 1
-pinseq=45
-T 200 2250 9 10 0 1 0 6 1
-pintype=pwr
-}
-P 0 1800 300 1800 1 0 0
-{
-T 350 1800 9 10 1 1 0 1 1
-pinlabel=P2.5/SVMOUT/CB5/A5/VREF+/VeREF+
-T 200 1850 5 8 1 1 0 6 1
-pinnumber=46
-T 200 1850 5 8 0 1 0 6 1
-pinseq=46
-T 200 1850 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 1400 300 1400 1 0 0
-{
-T 350 1400 9 10 1 1 0 1 1
-pinlabel=P2.4/RTCCLK/CB4/A4/VREF-/VeREF-
-T 200 1450 5 8 1 1 0 6 1
-pinnumber=47
-T 200 1450 5 8 0 1 0 6 1
-pinseq=47
-T 200 1450 9 10 0 1 0 6 1
-pintype=inout
-}
-P 0 1000 300 1000 1 0 0
-{
-T 350 1000 9 10 1 1 0 1 1
-pinlabel=P2.3/TA1CCR2A/CB3/A3
-T 200 1050 5 8 1 1 0 6 1
-pinnumber=48
-T 200 1050 5 8 0 1 0 6 1
-pinseq=48
-T 200 1050 9 10 0 1 0 6 1
-pintype=inout
-}
-P 4100 0 4100 300 1 0 0
-{
-T 4100 350 9 10 1 1 90 1 1
-pinlabel=VSS_EP
-T 4150 250 5 8 1 1 0 2 1
-pinnumber=49
-T 4150 250 5 8 0 1 0 2 1
-pinseq=49
-T 4000 750 9 10 0 1 0 6 1
-pintype=pwr
-}
diff --git a/test-pcb/sym/cc430f5137-2.djboxsym b/test-pcb/sym/cc430f5137-2.djboxsym
new file mode 100644
index 0000000..6b667ff
--- /dev/null
+++ b/test-pcb/sym/cc430f5137-2.djboxsym
@@ -0,0 +1,20 @@
+#
+# cc430f5137
+#
+
+
+[labels]
+refdes=CC430
+CC430F5137
+USCI
+2of6
+
+[left]
+4	io	P1.7/UCA0CLK/UCB0STE
+5	io	P1.6/UCA0TXD/UCA0MOSI
+6	io	P1.5/UCA0RXD/UCA0MISO
+9	io	P1.4/UCB0CLK/UCA0STE
+10	io	P1.3/UCB0MOSI/UCB0SDA
+11	io	P1.2/UCB0MISO/UCB0SCL
+
+# vim:softtabstop=0 noexpandtab ft=sh
diff --git a/test-pcb/sym/cc430f5137-2.sym b/test-pcb/sym/cc430f5137-2.sym
new file mode 100644
index 0000000..7e10f74
--- /dev/null
+++ b/test-pcb/sym/cc430f5137-2.sym
@@ -0,0 +1,76 @@
+v 20060123 1
+B 300 300 6100 2800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 3400 2500 9 10 1 1 0 3 1
+refdes=CC430
+T 3400 2100 9 10 1 1 0 3 1
+CC430F5137
+T 3400 1700 9 10 1 1 0 3 1
+USCI
+T 3400 1300 9 10 1 1 0 3 1
+2of6
+P 0 2700 300 2700 1 0 0
+{
+T 350 2700 9 10 1 1 0 1 1
+pinlabel=P1.7/UCA0CLK/UCB0STE
+T 200 2750 5 8 1 1 0 6 1
+pinnumber=4
+T 200 2750 5 8 0 1 0 6 1
+pinseq=4
+T 200 2750 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 2300 300 2300 1 0 0
+{
+T 350 2300 9 10 1 1 0 1 1
+pinlabel=P1.6/UCA0TXD/UCA0MOSI
+T 200 2350 5 8 1 1 0 6 1
+pinnumber=5
+T 200 2350 5 8 0 1 0 6 1
+pinseq=5
+T 200 2350 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 1900 300 1900 1 0 0
+{
+T 350 1900 9 10 1 1 0 1 1
+pinlabel=P1.5/UCA0RXD/UCA0MISO
+T 200 1950 5 8 1 1 0 6 1
+pinnumber=6
+T 200 1950 5 8 0 1 0 6 1
+pinseq=6
+T 200 1950 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 1500 300 1500 1 0 0
+{
+T 350 1500 9 10 1 1 0 1 1
+pinlabel=P1.4/UCB0CLK/UCA0STE
+T 200 1550 5 8 1 1 0 6 1
+pinnumber=9
+T 200 1550 5 8 0 1 0 6 1
+pinseq=9
+T 200 1550 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 1100 300 1100 1 0 0
+{
+T 350 1100 9 10 1 1 0 1 1
+pinlabel=P1.3/UCB0MOSI/UCB0SDA
+T 200 1150 5 8 1 1 0 6 1
+pinnumber=10
+T 200 1150 5 8 0 1 0 6 1
+pinseq=10
+T 200 1150 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 700 300 700 1 0 0
+{
+T 350 700 9 10 1 1 0 1 1
+pinlabel=P1.2/UCB0MISO/UCB0SCL
+T 200 750 5 8 1 1 0 6 1
+pinnumber=11
+T 200 750 5 8 0 1 0 6 1
+pinseq=11
+T 200 750 9 10 0 1 0 6 1
+pintype=inout
+}
diff --git a/test-pcb/sym/cc430f5137-3.djboxsym b/test-pcb/sym/cc430f5137-3.djboxsym
new file mode 100644
index 0000000..9a02e91
--- /dev/null
+++ b/test-pcb/sym/cc430f5137-3.djboxsym
@@ -0,0 +1,22 @@
+#
+# cc430f5137
+#
+
+
+[labels]
+refdes=CC430
+CC430F5137
+Sys/JTAG/SBW
+3of6
+
+[left]
+35	io	PJ.0/TDO
+36	io	PJ.1/TDI/TCLK
+37	io	PJ.2/TMS
+38	io	PJ.3/TCK
+39	i	TEST/SBWTCK
+40	io	\_RST\_/NMI/SBWTDIO
+43	io	P5.1/XOUT
+44	io	P5.0/Xi
+
+# vim:softtabstop=0 noexpandtab ft=sh
diff --git a/test-pcb/sym/cc430f5137-3.sym b/test-pcb/sym/cc430f5137-3.sym
new file mode 100644
index 0000000..4b534f3
--- /dev/null
+++ b/test-pcb/sym/cc430f5137-3.sym
@@ -0,0 +1,98 @@
+v 20060123 1
+B 300 300 4500 3600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 2600 3300 9 10 1 1 0 3 1
+refdes=CC430
+T 2600 2900 9 10 1 1 0 3 1
+CC430F5137
+T 2600 2500 9 10 1 1 0 3 1
+Sys/JTAG/SBW
+T 2600 2100 9 10 1 1 0 3 1
+3of6
+P 0 3500 300 3500 1 0 0
+{
+T 350 3500 9 10 1 1 0 1 1
+pinlabel=PJ.0/TDO
+T 200 3550 5 8 1 1 0 6 1
+pinnumber=35
+T 200 3550 5 8 0 1 0 6 1
+pinseq=35
+T 200 3550 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 3100 300 3100 1 0 0
+{
+T 350 3100 9 10 1 1 0 1 1
+pinlabel=PJ.1/TDI/TCLK
+T 200 3150 5 8 1 1 0 6 1
+pinnumber=36
+T 200 3150 5 8 0 1 0 6 1
+pinseq=36
+T 200 3150 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 2700 300 2700 1 0 0
+{
+T 350 2700 9 10 1 1 0 1 1
+pinlabel=PJ.2/TMS
+T 200 2750 5 8 1 1 0 6 1
+pinnumber=37
+T 200 2750 5 8 0 1 0 6 1
+pinseq=37
+T 200 2750 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 2300 300 2300 1 0 0
+{
+T 350 2300 9 10 1 1 0 1 1
+pinlabel=PJ.3/TCK
+T 200 2350 5 8 1 1 0 6 1
+pinnumber=38
+T 200 2350 5 8 0 1 0 6 1
+pinseq=38
+T 200 2350 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 1900 300 1900 1 0 0
+{
+T 350 1900 9 10 1 1 0 1 1
+pinlabel=TEST/SBWTCK
+T 200 1950 5 8 1 1 0 6 1
+pinnumber=39
+T 200 1950 5 8 0 1 0 6 1
+pinseq=39
+T 200 1950 9 10 0 1 0 6 1
+pintype=in
+}
+P 0 1500 300 1500 1 0 0
+{
+T 350 1500 9 10 1 1 0 1 1
+pinlabel=\_RST\_/NMI/SBWTDIO
+T 200 1550 5 8 1 1 0 6 1
+pinnumber=40
+T 200 1550 5 8 0 1 0 6 1
+pinseq=40
+T 200 1550 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 1100 300 1100 1 0 0
+{
+T 350 1100 9 10 1 1 0 1 1
+pinlabel=P5.1/XOUT
+T 200 1150 5 8 1 1 0 6 1
+pinnumber=43
+T 200 1150 5 8 0 1 0 6 1
+pinseq=43
+T 200 1150 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 700 300 700 1 0 0
+{
+T 350 700 9 10 1 1 0 1 1
+pinlabel=P5.0/Xi
+T 200 750 5 8 1 1 0 6 1
+pinnumber=44
+T 200 750 5 8 0 1 0 6 1
+pinseq=44
+T 200 750 9 10 0 1 0 6 1
+pintype=inout
+}
diff --git a/test-pcb/sym/cc430f5137-4.djboxsym b/test-pcb/sym/cc430f5137-4.djboxsym
new file mode 100644
index 0000000..c8c7788
--- /dev/null
+++ b/test-pcb/sym/cc430f5137-4.djboxsym
@@ -0,0 +1,40 @@
+#
+# cc430f5137
+#
+
+--vmode
+
+[labels]
+refdes=CC430
+CC430F5137
+Power
+4of6
+
+[left]
+8	p	DVCC
+22	p	DVCC
+41	p	DVCC
+
+7	p	VCORE
+
+45	p	AVCC
+
+42	p	AVSS
+
+
+[right]
+27	p	AVCC_RF
+28	p	AVCC_RF
+31	p	AVCC_RF
+32	p	AVCC_RF
+34		GUARD
+
+
+
+[top]
+
+
+[bottom]
+49	p	VSS_EP
+
+# vim:softtabstop=0 noexpandtab ft=sh
diff --git a/test-pcb/sym/cc430f5137-4.sym b/test-pcb/sym/cc430f5137-4.sym
new file mode 100644
index 0000000..a06371e
--- /dev/null
+++ b/test-pcb/sym/cc430f5137-4.sym
@@ -0,0 +1,142 @@
+v 20060123 1
+B 300 300 3100 4300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 1900 4000 9 10 1 1 0 3 1
+refdes=CC430
+T 1900 3600 9 10 1 1 0 3 1
+CC430F5137
+T 1900 3200 9 10 1 1 0 3 1
+Power
+T 1900 2800 9 10 1 1 0 3 1
+4of6
+P 0 2600 300 2600 1 0 0
+{
+T 350 2600 9 10 1 1 0 1 1
+pinlabel=VCORE
+T 200 2650 5 8 1 1 0 6 1
+pinnumber=7
+T 200 2650 5 8 0 1 0 6 1
+pinseq=7
+T 200 2650 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 4200 300 4200 1 0 0
+{
+T 350 4200 9 10 1 1 0 1 1
+pinlabel=DVCC
+T 200 4250 5 8 1 1 0 6 1
+pinnumber=8
+T 200 4250 5 8 0 1 0 6 1
+pinseq=8
+T 200 4250 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 3800 300 3800 1 0 0
+{
+T 350 3800 9 10 1 1 0 1 1
+pinlabel=DVCC
+T 200 3850 5 8 1 1 0 6 1
+pinnumber=22
+T 200 3850 5 8 0 1 0 6 1
+pinseq=22
+T 200 3850 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 3700 4200 3400 4200 1 0 0
+{
+T 3350 4200 9 10 1 1 0 7 1
+pinlabel=AVCC_RF
+T 3500 4250 5 8 1 1 0 0 1
+pinnumber=27
+T 3500 4250 5 8 0 1 0 0 1
+pinseq=27
+T 3300 4250 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 3700 3800 3400 3800 1 0 0
+{
+T 3350 3800 9 10 1 1 0 7 1
+pinlabel=AVCC_RF
+T 3500 3850 5 8 1 1 0 0 1
+pinnumber=28
+T 3500 3850 5 8 0 1 0 0 1
+pinseq=28
+T 3300 3850 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 3700 3400 3400 3400 1 0 0
+{
+T 3350 3400 9 10 1 1 0 7 1
+pinlabel=AVCC_RF
+T 3500 3450 5 8 1 1 0 0 1
+pinnumber=31
+T 3500 3450 5 8 0 1 0 0 1
+pinseq=31
+T 3300 3450 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 3700 3000 3400 3000 1 0 0
+{
+T 3350 3000 9 10 1 1 0 7 1
+pinlabel=AVCC_RF
+T 3500 3050 5 8 1 1 0 0 1
+pinnumber=32
+T 3500 3050 5 8 0 1 0 0 1
+pinseq=32
+T 3300 3050 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 3700 2600 3400 2600 1 0 0
+{
+T 3350 2600 9 10 1 1 0 7 1
+pinlabel=GUARD
+T 3500 2650 5 8 1 1 0 0 1
+pinnumber=34
+T 3500 2650 5 8 0 1 0 0 1
+pinseq=34
+T 3300 2650 9 10 0 1 0 6 1
+pintype=pas
+}
+P 0 3400 300 3400 1 0 0
+{
+T 350 3400 9 10 1 1 0 1 1
+pinlabel=DVCC
+T 200 3450 5 8 1 1 0 6 1
+pinnumber=41
+T 200 3450 5 8 0 1 0 6 1
+pinseq=41
+T 200 3450 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 1000 300 1000 1 0 0
+{
+T 350 1000 9 10 1 1 0 1 1
+pinlabel=AVSS
+T 200 1050 5 8 1 1 0 6 1
+pinnumber=42
+T 200 1050 5 8 0 1 0 6 1
+pinseq=42
+T 200 1050 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 0 1800 300 1800 1 0 0
+{
+T 350 1800 9 10 1 1 0 1 1
+pinlabel=AVCC
+T 200 1850 5 8 1 1 0 6 1
+pinnumber=45
+T 200 1850 5 8 0 1 0 6 1
+pinseq=45
+T 200 1850 9 10 0 1 0 6 1
+pintype=pwr
+}
+P 1900 0 1900 300 1 0 0
+{
+T 1900 350 9 10 1 1 90 1 1
+pinlabel=VSS_EP
+T 1950 250 5 8 1 1 0 2 1
+pinnumber=49
+T 1950 250 5 8 0 1 0 2 1
+pinseq=49
+T 1800 750 9 10 0 1 0 6 1
+pintype=pwr
+}
diff --git a/test-pcb/sym/cc430f5137-5.djboxsym b/test-pcb/sym/cc430f5137-5.djboxsym
new file mode 100644
index 0000000..e248501
--- /dev/null
+++ b/test-pcb/sym/cc430f5137-5.djboxsym
@@ -0,0 +1,20 @@
+#
+# cc430f5137
+#
+
+
+[labels]
+refdes=CC430
+CC430F5137
+Analog
+5of6
+
+[left]
+46	io	P2.5/SVMOUT/CB5/A5/VREF+/VeREF+
+47	io	P2.4/RTCCLK/CB4/A4/VREF-/VeREF-
+48	io	P2.3/TA1CCR2A/CB3/A3
+1	io	P2.2/TA1CCR1A/CB2/A2
+2	io	P2.1/TA1CCR0A/CB1/A1
+3	io	P2.0/CBOUT1/TA1CLK/CB0/A0
+
+# vim:softtabstop=0 noexpandtab ft=sh
diff --git a/test-pcb/sym/cc430f5137-5.sym b/test-pcb/sym/cc430f5137-5.sym
new file mode 100644
index 0000000..c742f20
--- /dev/null
+++ b/test-pcb/sym/cc430f5137-5.sym
@@ -0,0 +1,76 @@
+v 20060123 1
+B 300 300 8300 2800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 4500 2500 9 10 1 1 0 3 1
+refdes=CC430
+T 4500 2100 9 10 1 1 0 3 1
+CC430F5137
+T 4500 1700 9 10 1 1 0 3 1
+Analog
+T 4500 1300 9 10 1 1 0 3 1
+5of6
+P 0 1500 300 1500 1 0 0
+{
+T 350 1500 9 10 1 1 0 1 1
+pinlabel=P2.2/TA1CCR1A/CB2/A2
+T 200 1550 5 8 1 1 0 6 1
+pinnumber=1
+T 200 1550 5 8 0 1 0 6 1
+pinseq=1
+T 200 1550 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 1100 300 1100 1 0 0
+{
+T 350 1100 9 10 1 1 0 1 1
+pinlabel=P2.1/TA1CCR0A/CB1/A1
+T 200 1150 5 8 1 1 0 6 1
+pinnumber=2
+T 200 1150 5 8 0 1 0 6 1
+pinseq=2
+T 200 1150 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 700 300 700 1 0 0
+{
+T 350 700 9 10 1 1 0 1 1
+pinlabel=P2.0/CBOUT1/TA1CLK/CB0/A0
+T 200 750 5 8 1 1 0 6 1
+pinnumber=3
+T 200 750 5 8 0 1 0 6 1
+pinseq=3
+T 200 750 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 2700 300 2700 1 0 0
+{
+T 350 2700 9 10 1 1 0 1 1
+pinlabel=P2.5/SVMOUT/CB5/A5/VREF+/VeREF+
+T 200 2750 5 8 1 1 0 6 1
+pinnumber=46
+T 200 2750 5 8 0 1 0 6 1
+pinseq=46
+T 200 2750 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 2300 300 2300 1 0 0
+{
+T 350 2300 9 10 1 1 0 1 1
+pinlabel=P2.4/RTCCLK/CB4/A4/VREF-/VeREF-
+T 200 2350 5 8 1 1 0 6 1
+pinnumber=47
+T 200 2350 5 8 0 1 0 6 1
+pinseq=47
+T 200 2350 9 10 0 1 0 6 1
+pintype=inout
+}
+P 0 1900 300 1900 1 0 0
+{
+T 350 1900 9 10 1 1 0 1 1
+pinlabel=P2.3/TA1CCR2A/CB3/A3
+T 200 1950 5 8 1 1 0 6 1
+pinnumber=48
+T 200 1950 5 8 0 1 0 6 1
+pinseq=48
+T 200 1950 9 10 0 1 0 6 1
+pintype=inout
+}
diff --git a/test-pcb/sym/cc430f5137-6.djboxsym b/test-pcb/sym/cc430f5137-6.djboxsym
new file mode 100644
index 0000000..9a073ce
--- /dev/null
+++ b/test-pcb/sym/cc430f5137-6.djboxsym
@@ -0,0 +1,23 @@
+#
+# cc430f5137
+#
+
+
+[labels]
+refdes=CC430
+CC430F5137
+Timer/GP
+6of6
+
+[right]
+14	io	P3.7/SMCLK
+16	io	P3.5/TA0CCR4A
+17	io	P3.4/TA0CCR3A
+18	io	P3.3/TA0CCR2A
+19	io	P3.2/TA0CCR1A
+20	io	P3.1/TA0CCR0A
+21	io	P3.0/CBOUT0/TA0CLK
+23	io	P2.7/ADC12CLK/DMAE0
+24	io	P2.6/ACLK
+
+# vim:softtabstop=0 noexpandtab ft=sh
diff --git a/test-pcb/sym/cc430f5137-6.sym b/test-pcb/sym/cc430f5137-6.sym
new file mode 100644
index 0000000..fb1c1ad
--- /dev/null
+++ b/test-pcb/sym/cc430f5137-6.sym
@@ -0,0 +1,109 @@
+v 20060123 1
+B 300 300 4300 4000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 2500 3700 9 10 1 1 0 3 1
+refdes=CC430
+T 2500 3300 9 10 1 1 0 3 1
+CC430F5137
+T 2500 2900 9 10 1 1 0 3 1
+Timer/GP
+T 2500 2500 9 10 1 1 0 3 1
+6of6
+P 4900 3900 4600 3900 1 0 0
+{
+T 4550 3900 9 10 1 1 0 7 1
+pinlabel=P3.7/SMCLK
+T 4700 3950 5 8 1 1 0 0 1
+pinnumber=14
+T 4700 3950 5 8 0 1 0 0 1
+pinseq=14
+T 4500 3950 9 10 0 1 0 6 1
+pintype=inout
+}
+P 4900 3500 4600 3500 1 0 0
+{
+T 4550 3500 9 10 1 1 0 7 1
+pinlabel=P3.5/TA0CCR4A
+T 4700 3550 5 8 1 1 0 0 1
+pinnumber=16
+T 4700 3550 5 8 0 1 0 0 1
+pinseq=16
+T 4500 3550 9 10 0 1 0 6 1
+pintype=inout
+}
+P 4900 3100 4600 3100 1 0 0
+{
+T 4550 3100 9 10 1 1 0 7 1
+pinlabel=P3.4/TA0CCR3A
+T 4700 3150 5 8 1 1 0 0 1
+pinnumber=17
+T 4700 3150 5 8 0 1 0 0 1
+pinseq=17
+T 4500 3150 9 10 0 1 0 6 1
+pintype=inout
+}
+P 4900 2700 4600 2700 1 0 0
+{
+T 4550 2700 9 10 1 1 0 7 1
+pinlabel=P3.3/TA0CCR2A
+T 4700 2750 5 8 1 1 0 0 1
+pinnumber=18
+T 4700 2750 5 8 0 1 0 0 1
+pinseq=18
+T 4500 2750 9 10 0 1 0 6 1
+pintype=inout
+}
+P 4900 2300 4600 2300 1 0 0
+{
+T 4550 2300 9 10 1 1 0 7 1
+pinlabel=P3.2/TA0CCR1A
+T 4700 2350 5 8 1 1 0 0 1
+pinnumber=19
+T 4700 2350 5 8 0 1 0 0 1
+pinseq=19
+T 4500 2350 9 10 0 1 0 6 1
+pintype=inout
+}
+P 4900 1900 4600 1900 1 0 0
+{
+T 4550 1900 9 10 1 1 0 7 1
+pinlabel=P3.1/TA0CCR0A
+T 4700 1950 5 8 1 1 0 0 1
+pinnumber=20
+T 4700 1950 5 8 0 1 0 0 1
+pinseq=20
+T 4500 1950 9 10 0 1 0 6 1
+pintype=inout
+}
+P 4900 1500 4600 1500 1 0 0
+{
+T 4550 1500 9 10 1 1 0 7 1
+pinlabel=P3.0/CBOUT0/TA0CLK
+T 4700 1550 5 8 1 1 0 0 1
+pinnumber=21
+T 4700 1550 5 8 0 1 0 0 1
+pinseq=21
+T 4500 1550 9 10 0 1 0 6 1
+pintype=inout
+}
+P 4900 1100 4600 1100 1 0 0
+{
+T 4550 1100 9 10 1 1 0 7 1
+pinlabel=P2.7/ADC12CLK/DMAE0
+T 4700 1150 5 8 1 1 0 0 1
+pinnumber=23
+T 4700 1150 5 8 0 1 0 0 1
+pinseq=23
+T 4500 1150 9 10 0 1 0 6 1
+pintype=inout
+}
+P 4900 700 4600 700 1 0 0
+{
+T 4550 700 9 10 1 1 0 7 1
+pinlabel=P2.6/ACLK
+T 4700 750 5 8 1 1 0 0 1
+pinnumber=24
+T 4700 750 5 8 0 1 0 0 1
+pinseq=24
+T 4500 750 9 10 0 1 0 6 1
+pintype=inout
+}
-- 
2.25.1